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Program code conversion processing method and device and compiling system

A technology for transforming processing and program code, applied in the computer field, which can solve problems such as reducing optimization overhead and failing to meet control flow performance.

Inactive Publication Date: 2019-05-07
HUAWEI TECH CO LTD +1
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  • Description
  • Claims
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Problems solved by technology

[0005] This application provides a program code conversion processing method, device and compiling system, which are used to solve the problem that the prior art cannot meet the requirements of eliminating performance degradation caused by control flow without introducing too much optimization overhead

Method used

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  • Program code conversion processing method and device and compiling system
  • Program code conversion processing method and device and compiling system
  • Program code conversion processing method and device and compiling system

Examples

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Embodiment Construction

[0069] In SIMT architecture, threads are usually organized according to grid (Grid), thread block (Block) and thread warp (Warp). Among them, the Grid contains multiple Blocks, and each Block contains multiple Warps. Each Warp contains multiple threads and is the smallest scheduling unit on the GPU. Generally, there are 32 threads in a single Warp. The threads in a warp follow the SIMT scheduling mode, that is, all threads in the warp execute the same sequence of instructions.

[0070] The Warp is divided into multiple groups of threads. When the Warp executes the branch program, each group of threads in the Warp executes a single branch. Since the thread in the Warp is a single instruction stream, the total time for the Warp to execute the branch program is that each group of threads executes its own branch. The sum of the time, that is, the total time for Warp to execute the branch program is longer, which affects the execution performance of the program.

[0071] An exampl...

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Abstract

The invention provides a program code conversion processing method and device and a compiling system. The method comprises the steps of obtaining a to-be-compiled application program code; determiningcode characteristics of the application program code, wherein the code characteristics comprise whether the application program code is a convertible code, a public computing code in a control flow branch of the application program code and a public memory access code in the control flow branch of the application program code; and if the application program code is a convertible code, performingconversion processing on a control flow branch code in the application program code according to the public computing code, the public memory access code and hardware platform parameter information, and generating a target code after conversion processing. According to the method, the application program code is converted in combination with the specific situation of the application program code,so that the requirements of eliminating performance reduction caused by a control flow and not introducing excessive optimization overhead in various scenes can be met.

Description

technical field [0001] The present application relates to the field of computers, in particular to a program code conversion processing method, device and compiling system. Background technique [0002] As the application fields of computing platforms built on the basis of graphics processing unit (Graphics Processing Unit, GPU) technology become more and more extensive, more program developers need to develop software on the GPU platform. To carry out software development on the GPU platform, the architecture characteristics of the GPU platform need to be followed. The current GPU platform mainly adopts a Single Instruction Multi-Thread (Single Instruction Multi Thread, SIMT) architecture. In SIMT architecture, threads are usually organized according to grid (Grid), thread block (Block) and warp. Among them, the Grid contains multiple Blocks, and each Block contains multiple Warps. Each Warp contains multiple threads and is the smallest scheduling unit on the GPU. General...

Claims

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Application Information

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IPC IPC(8): G06F8/41G06F9/38
Inventor 卢兴敬
Owner HUAWEI TECH CO LTD
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