Mapping method and device for coarse-grained reconfigurable password logic array

A cryptographic logic and coarse-grained technology, applied in the computer field, can solve the problems of complex mapping process and low algorithm mapping efficiency, and achieve the effect of accelerating the mapping convergence process, improving mapping performance and efficiency, and reducing the complexity of algorithm mapping

Active Publication Date: 2019-07-19
PLA STRATEGIC SUPPORT FORCE INFORMATION ENG UNIV PLA SSF IEU
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Problems solved by technology

[0005] At present, the cryptographic algorithm mapping based on CGRCLA will map the above-mentioned computing nodes with the FU in the PE to guide the layout and wiring. During the mapping, manual mapping is often used for assistance. The algorithm mapping efficiency is not high, and the mapping process is relatively complicated.

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  • Mapping method and device for coarse-grained reconfigurable password logic array
  • Mapping method and device for coarse-grained reconfigurable password logic array
  • Mapping method and device for coarse-grained reconfigurable password logic array

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Embodiment Construction

[0058] In order to facilitate the understanding of the solutions provided by the embodiments of the present invention, a coarse-grained reconfigurable cryptographic logic array and a cryptographic algorithm data flow diagram are firstly introduced.

[0059] Coarse-Grained Reconfigurable Cryptographic Logic Array (CGRCLA) is designed based on the characteristics of cryptographic algorithms, and its hardware structure is suitable for cryptographic algorithm mapping based on data streams.

[0060] CGRCLA can include multiple fully interconnected reconfigurable processing units ((reconfigurable

[0061] Processing Element, PE).

[0062] PE is a set of computing structures oriented to cryptographic algorithm processing designed with reconfigurable technology, please refer to Figure 2a , There are three types of PE: reconfigurable S box unit (PE_S), reconfigurable key storage unit (PE_K), and reconfigurable logical processing unit (PE_L).

[0063] Adjacent PEs (that is, between P...

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Abstract

The invention provides a mapping method and a mapping device for a coarse-grained reconfigurable password logic array so as to simplify a mapping process. The coarse-grained reconfigurable password logic array comprises reconfigurable processing units PE which are fully interconnected; the method comprises the following steps: dividing operation nodes in a cryptographic algorithm data flow graph into a plurality of operation clusters; taking PE in the coarse-grained reconfigurable password logic array as an ant node, and calculating by using an ant colony algorithm to obtain an optimal mappingpath between the coarse-grained reconfigurable password logic array and an operation cluster; wherein each PE in the optimal mapping path is mapped with one operation cluster. Visibly, in the embodiment of the invention, the cryptographic algorithm data flow graph is divided in advance, and then mapping is performed based on the operation cluster, so that the mapping granularity of the cryptographic algorithm data flow graph is increased, and the algorithm mapping complexity is correspondingly reduced. Meanwhile, the mapping between the coarse-grained reconfigurable password logic array and the operation cluster is completed by adopting an ant colony algorithm, the mapping convergence process can be accelerated, and the mapping performance and efficiency are improved.

Description

technical field [0001] The invention relates to the field of computers, in particular to a mapping method and device for a coarse-grained reconfigurable cryptographic logic array. Background technique [0002] Coarse-Grained Reconfigurable Cryptography Logic Array (CGRCLA) is a coarse-grained reconfigurable computing model for the field of cryptography, which effectively makes up for the shortcomings of FPGA-like fine-grained reconfigurable devices in coarse-grained computing. The problem of the limited computing power of the board and the cryptographic processor of the special instruction set. [0003] CGRCLA-based cryptographic algorithm mapping is used to map the high-level description of cryptographic algorithms (such as cryptographic algorithm data flow graphs) with coarse-grained reconfigurable cryptographic logic arrays. [0004] figure 1 An exemplary structure of a cryptographic algorithm data flow graph is shown, which generally includes a plurality of computing n...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/06
CPCH04L9/06H04L2209/12Y02D10/00
Inventor 李伟杜怡然陈韬朱春生郭朋飞南龙梅戴紫彬严迎建徐劲松李军伟
Owner PLA STRATEGIC SUPPORT FORCE INFORMATION ENG UNIV PLA SSF IEU
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