Data processing method, system and terminal equipment

A data processing and data technology, applied in the direction of electrical digital data processing, program control design, program startup/switching, etc., can solve the problem of FPGA accelerator card lack of independent working ability and so on

Pending Publication Date: 2019-11-01
江苏鼎速网络科技有限公司
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Problems solved by technology

[0005] The object of the present invention is to provide a kind of data processing method, system and terminal equipment, to solve the prior art FPGA accelerat

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  • Data processing method, system and terminal equipment
  • Data processing method, system and terminal equipment
  • Data processing method, system and terminal equipment

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Embodiment Construction

[0032] The present invention will be described in detail below in conjunction with the implementations shown in the drawings, but it should be noted that these implementations are not limitations of the present invention, and those of ordinary skill in the art based on the functions, methods, or structural changes made by these implementations Equivalent transformations or substitutions all fall within the protection scope of the present invention.

[0033] The technical solutions provided by various embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0034] figure 1 It is a schematic structural diagram of a data processing device according to an embodiment of the present invention to solve the problem in the prior art that the FPGA accelerator card needs to be inserted into a host computer such as a PC to work, but lacks the ability to work independently. The method of the embodiment of the present invention...

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Abstract

The invention provides a data processing method, a data processing system and terminal equipment. The method comprises the steps: receiving a data task processing request transmitted by a source end,and enabling a main control FPGA to be at least logically independent from the source end; decomposing the data task into i data subtasks based on the data task processing request; scheduling i data processing FPGAs based on the i data sub-tasks to control the i data processing FPGAs to generate i target result data based on the corresponding data sub-tasks in the i data sub-tasks; and receiving the target result data sent by the i data processing FPGAs so as to feed back the i target result data to the source end. The FPGA acceleration card solves the problem that the FPGA acceleration card in the prior art needs to be inserted into hosts such as a PC (Personal Computer) and the like to work, so that the FPGA acceleration card is lack of independent working capacity.

Description

technical field [0001] The present invention relates to the field of computer data processing, in particular to a data processing method, system and terminal equipment. Background technique [0002] Currently, computing acceleration for domain applications can be achieved in three ways. First, the ASIC method, that is, using an application-specific integrated circuit to implement computing tasks in a completely hardware manner. The main feature of this method is that it is specially designed for specific computing tasks, fully taps the parallelism of the problem itself, and uses large-scale parallel circuits for calculations to obtain high computing speed and efficiency. However, the biggest defect of this method is that it is almost There is no flexibility, or non-programmability, and the circuit must be modified for a slight change in the task. Second, the general-purpose microprocessor method, select the instructions of the processor to form a new instruction sequence a...

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Application Information

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IPC IPC(8): G06F9/50G06F9/48
CPCG06F9/5027G06F9/4843G06F9/5066G06F2209/509
Inventor 臧春峰王斌严大卫陈芬
Owner 江苏鼎速网络科技有限公司
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