Mask-based hybrid floating-point multiplication low-power-consumption control method and device

Abstract

The invention discloses a mask-based hybrid floating-point multiplication low-power-consumption control method . The method comprises the following steps: hardware automatically determines a hybrid floating point multiplication operation type, fills high bits of mantissa of a standard floating point multiplier and a multiplicand with all zero, and enables the floating point multiplier and the multiplicand to be the same as the input bit width of a multiplex fixed-point hardware multiplier; and for floating point multiplication operation, a partial product is obtained from the filled floating point multiplier and multiplicand according to a preset multiplication encoding rule and a symbol extension rule, an invalid mantissa is moved to a high order, and the invalid mantissa is controlled not to participate in partial product compression summation operation by adopting a mask so as to save logic power consumption. The invention further discloses a hybrid floating point multiplication low-power-consumption control device based on the mask. The method supports multiplexing of fixed-point multiplication hardware to realize low-power-consumption control of floating-point multiplication,automatic detection of floating-point multiplication operation by the hardware and control of high-order expansion bit coding based on masks, and has the advantages of low hardware overhead, easinessin logic implementation, simplicity in power consumption control and the like.

Description

technical field [0001] The invention relates to the fields of high-performance microprocessor design and low power consumption design, in particular to a mask-based mixed floating point multiplication low power consumption control method and device. Background technique [0002] With the rapid development of semiconductor technology, the integration scale and operating frequency of microprocessor chips continue to increase, resulting in a sharp increase in chip power consumption, which poses a huge challenge to chip heat dissipation, energy consumption and reliability. Therefore, low power consumption design has become Microprocessor design research hotspot. Floating-point processing capability has always been an important evaluation index for high-performance microprocessors, and the key core component that characterizes this capability is the floating-point multiplication or floating-point multiply-add (including floating-point multiplication) unit. Point calculation capa...

AI Technical Summary

Problems solved by technology

However, the disadvantage of this technology is that it will increase the logic overhead, especially for high-performance microprocessors integrating ultra-multiple floating-point multiplication units, the hardware overhead and power consumption control especially need to be considered in balance

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