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3results about How to "Simple implementation logic" patented technology

Blade repair path conformal compensation method and equipment based on non-rigid matching

PendingCN121997601ACalculation is accurate and reliableAccurate and reliable evaluationGeometric CADImage analysisTarget surfaceAviation
The invention belongs to the related technical field of aero-engine manufacturing and precision repair, and discloses a blade repair path follow-up compensation method and device based on non-rigid matching, and the method comprises the steps: S1, reconstructing a machining error reference point cloud curved surface based on a scanning data point set and a repair region design model; s2, performing unified modeling on the static deviation of the machining error of the to-be-compensated blade to obtain an error transfer model, and simplifying the corresponding nonlinear comprehensive machining error into a calculation equation of linear pose deviation of a local workpiece coordinate system; s3, establishing a tangent contact approximation cost function based on non-rigid matching so as to register and approach a target curved surface under the constraint of retaining tool path features, and meanwhile, solving a calculation equation by adopting a least square method so as to obtain a linear pose deviation of a local workpiece coordinate system, solving to obtain a pose deviation of each tangent contact coordinate system so as to obtain a linear pose deviation of each tangent contact coordinate system; and furthermore, each cutting contact and each cutter location point are updated, and the shape follow-up compensation of the blade is realized. The compensation precision is improved.
Owner:HUAZHONG UNIV OF SCI & TECH

Data format conversion method, device, equipment, storage medium and program product

ActiveCN120743996Bsimple implementation logicImprove general performance
The application discloses a data format conversion method and device, equipment, a storage medium and a program product, and relates to the technical field of data processing. The method comprises the following steps: acquiring source data to be subjected to data format conversion, a source data format corresponding to the source data, and a target data format; and determining a target conversion mode for directly converting the source data from the source data format to the target data format based on the source data, the source data format and the target data format. The application can directly convert the source data from the source data format to the target data format through a single-step conversion, and does not need to cache intermediate results in an intermediate resource, so that the logical implementation is simple and has strong universality.
Owner:MOORE THREADS TECHNOLOGY (SHANGHAI) CO LTD

Analog circuit for implementing power-down detection memory

The application belongs to the field of power-off detection, and discloses an analog circuit for realizing power-off detection memory, which comprises an initialization control module, a state latching module and an output buffer module; the initialization control module is used for enabling the state latching module after receiving an erasing control signal sent by a master control chip; the state latching module is used for receiving a measured signal, latching and memorizing a power-off detection signal through a disconnector logic; when the power supply of the measured signal is not powered off and the state latching module receives an enabling signal of the initialization control module, the state latching module enters a self-locking on state; when the power supply of the measured signal is powered off, the state latching module enters a locking off state; and the output buffer module is used for converting an analog voltage of the state latching module into a digital logic level. In this way, the detection and memory functions are completely separated from the master control chip, complete decoupling at the hardware level is realized, and repeated erasing and writing operations on the nonvolatile memory of the master control chip are avoided.
Owner:ZHEJIANG HAIYINGJUN ELECTRONIC TECH CO LTD