1results about How to "Simple implementation logic" patented technology

The application belongs to the field of power-off detection, and discloses an analog circuit for realizing power-off detection memory, which comprises an initialization control module, a state latching module and an output buffer module; the initialization control module is used for enabling the state latching module after receiving an erasing control signal sent by a master control chip; the state latching module is used for receiving a measured signal, latching and memorizing a power-off detection signal through a disconnector logic; when the power supply of the measured signal is not powered off and the state latching module receives an enabling signal of the initialization control module, the state latching module enters a self-locking on state; when the power supply of the measured signal is powered off, the state latching module enters a locking off state; and the output buffer module is used for converting an analog voltage of the state latching module into a digital logic level. In this way, the detection and memory functions are completely separated from the master control chip, complete decoupling at the hardware level is realized, and repeated erasing and writing operations on the nonvolatile memory of the master control chip are avoided.