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Method for realizing 4KB-crossing transmission of AXI bus host equipment

A technology of a host device and an implementation method, applied in the fields of instruments, electrical digital data processing, etc., can solve the problems of increasing the responsibility and execution time of the upper computer software, unable to achieve high performance of AXI bus, high bandwidth and low delay, etc., to improve transmission. Effectiveness and responsiveness, improved utilization, simplified software operations

Active Publication Date: 2020-02-11
SHANDONG SINOCHIP SEMICON
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  • Claims
  • Application Information

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Problems solved by technology

Therefore, the advantages of high performance, high bandwidth and low latency of the AXI bus cannot be realized, and at the same time, the responsibility and execution time of the upper computer software are increased, which brings unnecessary burden and performance loss to the system

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  • Method for realizing 4KB-crossing transmission of AXI bus host equipment

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Embodiment 1

[0014] This embodiment discloses a method for realizing cross-4K transmission of an AXI bus host device, including the following steps: S01), when the host device sends a read and write operation command, read the read and write information sent by the current host device, including the read and write ID identification , Read and write first address, read and write length, read and write data bit width, judge the data length Len of 4KB boundary by reading and writing first address, data bit width, Len=(D-D 0 ) / W, D is the 4KB boundary address, D 0 It is the first address for reading and writing, W is the bit width of reading and writing data, and the unit is Byte;

[0015] S02), compare the read-write length read in step S01 with the data length of the 4KB boundary, if the read-write length is less than or equal to the data length of the 4KB boundary, execute step S03, and if the read-write length is greater than the data length of the 4KB boundary, execute step S04 ;

[001...

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Abstract

The invention discloses a method for realizing cross-4K transmission of AXI (Advanced eXtensible Interface) bus host equipment, which comprises the following steps of: splitting a read-write operationcommand of which the data transmission quantity is greater than 4KB into a plurality of read-write operation sub-commands, sending the read-write operation sub-commands to a slave, and combining responses returned by the plurality of read-write operation sub-commands into a read-write response to return host equipment. The limitation that an AXI protocol does not allow cross-4K transmission in the upper computer configuration process is broken, the transmission size is increased to the full bandwidth 32K of AXI, and the high transmission performance of an AXI protocol is further realized. Thedifficulty of out-of-order transmission in the 4K transmission process is solved, the solution is also suitable for other out-of-order transmission, and full support for the high-speed performance ofthe AXI protocol is truly realized.

Description

technical field [0001] The invention discloses a method for realizing cross-4KB transmission of an AXI bus host device, and belongs to the technical field of the AXI bus. Background technique [0002] The AXI bus is a close cooperation between Xilinx and ARM to jointly define the AXI protocol specification for FPGA-based high-performance systems and designs. The data bit width of the AXI protocol supports up to 1024 bits, and the burst transmission length supports up to 256, so the maximum data volume of a burst transmission supports 32KB. However, the protocol itself does not support transmission across the 4K boundary. The AXI protocol stipulates that operations across the 4KB boundary cannot be performed in one transmission. In the existing AXI bus-based data transmission implementation methods, by limiting the data bit width or transmission length, the transmission The amount of data is less than or equal to 4KB, to avoid data transmission where the address crosses the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/42
CPCG06F13/42Y02D10/00
Inventor 孙中琳刘尚刘大铕朱苏雁刘奇浩王运哲
Owner SHANDONG SINOCHIP SEMICON
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