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Method and apparatus for performing task-level cache management in electronic device

A technology of high-speed cache and electronic equipment, which is applied in the direction of multi-programming devices, electrical digital data processing, memory systems, etc., to achieve the effect of ensuring overall performance

Active Publication Date: 2020-03-17
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, there may be a trade-off between processing performance and cache performance

Method used

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  • Method and apparatus for performing task-level cache management in electronic device
  • Method and apparatus for performing task-level cache management in electronic device
  • Method and apparatus for performing task-level cache management in electronic device

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Embodiment Construction

[0015] Certain terms are used throughout the following description and claims to refer to specific components. As will be understood by those skilled in the art, electronic device manufacturers may refer to components by different names. This document does not intend to distinguish between components that have different names but have the same function. In the following description and claims, the terms "comprises" and "comprises" are used in an open-ended manner and should therefore be construed to mean "including but not limited to...". Also, the term "coupled" is intended to mean an indirect or direct electrical connection. Thus, if a device couples to another device, that connection may be through a direct electrical connection or through an indirect electrical connection via other devices and connections.

[0016] figure 1 is a diagram illustrating an apparatus 100 for performing task-level cache management in an electronic device according to an embodiment of the pres...

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Abstract

A method and an apparatus for performing task-level cache management in an electronic device are provided. The method may be applied to a processing circuit of the electronic device, and may include the steps: before a task of a plurality of tasks runs on a processor core, performing at least one checking operation on the task to generate at least one checking result, wherein the at least one checking result indicates whether the task is a risky task with risk of evicting cached data of an urgent task from a cache, and the cache is dedicated to a set of processor cores including the processorcore; and according to the at least one checking result, determining whether to temporarily limit cache access permission of the processor core during a time period in which the task runs on the processor core, for preventing cache eviction of the cache due to the task.

Description

technical field [0001] The present invention relates to cache control, and more particularly, to methods and apparatus for performing task-level cache management in electronic devices. Background technique [0002] According to prior art, keeping frequently accessed data in cache can enhance system performance, but this is not always the case. For example, an operating system may allocate processing resources to urgent tasks with higher priority, while cache memory is usually allocated only with reference to access frequency. Among the various processing resource allocations, cache resources are currently allocated without system-level performance optimizations. As a result, there may be a trade-off between processing performance and cache performance. Therefore, novel methods and related architectures are needed to enhance the overall performance of electronic devices. Contents of the invention [0003] One of the objects of the present invention is to provide a method...

Claims

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Application Information

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IPC IPC(8): G06F11/00G06F9/50
CPCG06F11/004G06F9/5016G06F2209/504G06F12/0875G06F12/0888G06F2212/1016Y02D10/00
Inventor 魏圣儒陈家明郑亦呈张顺杰
Owner MEDIATEK INC