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Graphic command pre-decoding model based on SystemVerilog, in particular to graphic command pre-decoding model based on SystemVerilog

A graphics command and pre-decoding technology, applied in the direction of processor architecture/configuration, can solve problems such as no model building scheme

Active Publication Date: 2020-04-17
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the pre-decoding unit includes at least two data sources and multiple processing delivery channels, when it is verified, it first encounters the problem of verification correctness, which requires a comparison of the design output model, and the existing technology has no specific construction scheme for this model

Method used

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  • Graphic command pre-decoding model based on SystemVerilog, in particular to graphic command pre-decoding model based on SystemVerilog

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Embodiment Construction

[0016] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail below in conjunction with examples. It should be understood that the specific examples described here are only used to explain the present invention, not to limit the present invention.

[0017] The technical solutions of the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0018] In one embodiment of the present invention, a kind of graphics command pre-decoding model based on SystemVerilog dynamic array and task is proposed, it is characterized in that, this model comprises: preparation task block 1, order parsing task block 2, drawing class command processing task Block 3, parameter configuration command processing task block 4, display list command processing task block 5, display list writing task block 6 and display list...

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Abstract

The invention belongs to the field of computer graphics, and in particular to a graphic command pre-decoding model based on a SystemVerilog dynamic array and a task. The model comprises a preparationtask block, a command analysis task block, a drawing type command processing task block, a parameter configuration type command processing task block, a display list command processing task block, a display list writing task block and a display list reading task block. In the working process of the model, operation data and output results are dynamic arrays of SystemVerilog, read and write tasks of a preparation task and a display list further achieve interaction with files, and data comparison and check in the verification process are facilitated. The processing process does not contain a time sequence, processing tasks of various commands store results into corresponding dynamic arrays, the process is clear, maintenance is convenient, and the simulation speed is greatly increased.

Description

technical field [0001] The invention belongs to the field of computer graphics, in particular to a graphics command pre-decoding model based on SystemVerilog dynamic arrays and tasks. Background technique [0002] In the field of computer graphics, there are many kinds of OpenGL graphics commands. OpenGL programs written by software personnel need to be preprocessed according to the defined command format before entering the processing flow of the GPU. The pre-decoding unit performs preprocessing operations. key circuits. Since the pre-decoding unit includes at least two data sources and multiple processing delivery channels, when it is verified, it first encounters the problem of verification correctness, which requires a comparison of the design output model, but there is no specific construction scheme for this model in the prior art. Contents of the invention [0003] Aiming at the problems existing in the background technology, the present invention now proposes a g...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/20
CPCG06T1/20Y02D10/00
Inventor 牛少平郝冲邓艺韩一鹏魏艳艳
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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