A kind of optical SOC chip test method and system based on function test

Abstract

The present invention is based on the optical SOC chip test system of function test, comprises upper computer system and hardware test system, and affiliated hardware test system comprises communication module and detection module, and described detection module is made up of power supply unit, PMU test unit, FPGA function test unit, relay Composed of a matrix unit and a light source control unit; the above-mentioned components are connected upstream to the host computer system through the bus, and connected downstream to the optical sensor SOC chip to be tested. The hardware test system is mainly responsible for DC parameter testing and photosensitive logic testing. An optical SOC chip testing method based on functional testing, which uses constant voltage and current sources to apply precise constant voltage or constant current to the device under test; adopts a modular structure on the hardware, and uses the FPGA functional test unit to test the function logically. Realize the physical functional test and photosensitive logic test of the optical SOC chip, and the test cost is much lower than the traditional mixed signal test system.

Description

technical field [0001] The invention relates to an optical sensor SOC chip testing method and system. Background technique [0002] With the development of design and manufacturing technology, the integration of SOC optical sensors is getting higher and higher, and the area is getting bigger and bigger. In recent years, it has developed to the system-level chip stage, and SOC design has become one of the hot spots of design. The design mode of optical SOC is different from the vertical design mode of large-scale integrated circuits in the past. Its design mode is horizontal, that is, SOC integrators choose IP cores provided by different manufacturers to build chip systems. This horizontal design mode shortens the SOC design cycle on the one hand, but on the other hand makes SOC testing face great challenges. The complexity and diversity of the chip brings the complexity of the test; the test of the traditional optical sensor SOC chip mainly adopts built-in self-test (Buil...

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Problems solved by technology

This method requires a self-built DFT sequencing module inside the chip, which will directly increase the area of ​​the chip by 20%-30%, and the abnormality of the photosensitive matrix cannot be detected by the logic scan test under special circumstances such as physical occlusion. AutomaticTestEquipment) has very high requirements for test channel depth, test time, and analog test components (currently general-purpose mixed-signal testers such as V50, J750, and V9300 are all around 500,000-1 million RMB, and the test cost is very high)

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