Cache protection method and device based on dynamic mapping mechanism

Abstract

The embodiment of the invention provides a cache protection method and device based on a dynamic mapping mechanism. The method comprises: when a processor sends an instruction for requesting reading operation to a cache, comparing an address of request data of the processor with a cache address of data cached in the cache in an address table, and determining whether the address of the request datahits a certain table item in the address table or not; if the table entry is hit, inquiring a valid bit table corresponding to the table entry, determining whether the table entry is in a valid stateor not, if so, obtaining a data row address corresponding to the request data from the association table, and taking out the request data from the data table; and if the missed or hit table entry isin an invalid state, the cache sends a missing signal to force the processor to acquire data corresponding to the read request operation from the main memory. According to the embodiment of the invention, the cache access time is balanced, time sequence information is prevented from being utilized, and the security of the processor is improved.

Description

technical field [0001] The invention belongs to the technical field of information security, and in particular relates to a cache protection method and device based on a dynamic mapping mechanism. Background technique [0002] Speculative execution of instructions improves processor performance and is widely used in modern processors. However, current research shows that through speculative execution, processors can expose kernel data, resulting in data leakage. [0003] Specter and Meltdown attacks pose serious threats to processor security. In a common Specter attack case, it accesses the kernel space through malicious instructions, and then uses the data in the kernel space as an address reference to load the memory data at the corresponding address. In this process, since the load instruction loads the memory data with the kernel data as the address, the cache will be replaced, and the cache line of the corresponding address will be loaded into the cache. Although the...

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Problems solved by technology

[0005] In order to overcome the problem of processor performance loss caused by the above-mentioned existing cache protection method or at least partially solve the above-mentioned problem, an embodiment of the present invention provides a cache protection method and device based on a dynamic mapping mechanism

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