Gate drive circuit and display device

Abstract

The invention provides a gate drive circuit and a display device, and the gate drive circuit comprises two low-frequency AC signal lines which are used for transmitting low-frequency AC signals; and Nclock signal lines which are used for transmitting a clock signal, wherein the frequency of the clock signal is higher than that of the low-frequency AC signal, each clock signal line is provided with at least one capacitance compensation unit, the sum of the area of any clock signal line and the area of at least one capacitance compensation unit arranged on the same clock signal line is equal toa preset area, and N is an integer greater than or equal to 2, and wherein the at least one capacitance compensation unit arranged on each clock signal line comprises a first capacitance compensationunit arranged corresponding to at least one of the two low-frequency AC signal lines; the sum of the areas of the first capacitance compensation units arranged corresponding to one low-frequency AC signal line is equal to the sum of the areas of the first capacitance compensation units arranged corresponding to the other low-frequency alternating-current signal line.

Description

technical field [0001] The present application relates to the field of display technology, in particular to a gate drive circuit and a display device. Background technique [0002] At present, most gate driving circuits of a liquid crystal display (Liquid Crystal Display, LCD) adopt a design in which the gate driving circuit is arranged on a gate on array substrate (Gate On Array, GOA). The GOA circuit mainly includes a GOA busline circuit and a GOA unit circuit. The former refers to the wiring of each scan start signal and clock signal, and the latter refers to an independent unit including a complete GOA. [0003] Figure 1a is a schematic diagram of a traditional GOA wiring circuit, CK1-CKn are clock signal wiring, and n is 12. LC1 and LC2 are traces that provide low-frequency AC voltage signals to the pull-down sustaining unit of the GOA independent unit, and are reversed every 100 frames (Frame). VSS is a trace that provides a low potential DC voltage signal. a1-a3 a...

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present application is to provide a gate drive circuit and a display device, to balance the falling time of the output scan signal of the gate drive unit connected to multiple clock signal lines in the gate drive circuit, and to avoid the capacitance difference of the clock signal lines from causing The display device has problems such as horizontal dense lines and uneven brightness and darkness, and while making full use of the free space of the two low-frequency AC signal lines, the two low-frequency AC signal lines have the same load

Images