Timestamp jitter compensation method and device

Abstract

The embodiment of the invention provides a timestamp jitter compensation method and device, and the method comprises the steps: carrying out the clock synchronization of a timestamp sampling identification signal of a first system clock domain based on a 1588 clock, and obtaining a timestamp sampling identification signal of the 1588 clock domain; performing clock synchronization on the timestampsampling identification signal of the 1588 clock domain based on a system clock to obtain a timestamp sampling identification signal of a second system clock domain; and performing timestamp delay compensation according to the interval period between the timestamp sampling identification signal of the first system clock domain and the timestamp sampling identification signal of the second system clock domain. According to the timestamp jitter compensation method and device provided by the embodiment of the invention, errors caused by synchronization of timestamp sampling identification signalsof a system clock domain are amplified, and then discrimination compensation is carried out, so that the jitter of the timestamp is effectively compensated.

Description

technical field [0001] The present invention relates to the technical field of time synchronization, in particular to a time stamp jitter compensation method and device. Background technique [0002] With the advent of the 5G communication era, 5G communication poses new requirements and challenges for time synchronization technology, and improving the accuracy of time stamps is the key to meeting new requirements. [0003] When processing timestamps, there is a conversion problem from the timestamp sampling identification signal in the system clock domain or the local clock domain to the timestamp sampling identification signal in the 1588 clock domain. For the 125MHz 1588 clock, the clock domain conversion error of the timestamp sampling identification signal is ±8ns, this error will cause the jitter of the time stamp, and then affect the performance of time synchronization. [0004] In the prior art, the time stamp jitter compensation methods include increasing the frequ...

AI Technical Summary

Problems solved by technology

[0006] In order to solve the problem that the clock domain conversion error of ±8 ns from the time stamp sampling identification signal in the system clock domain or the local clock domain to the time stamp sampling identification signal in t

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