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Electronic device with multiple processors and synchronization method of processors

A technology for electronic devices and processors, applied in electrical digital data processing, instruments, signal generation/distribution, etc., can solve problems such as difficult signal delay compensation, high requirements for processor clock signals, and different signal delays. Opportunity for errors, elimination of counting errors, elimination of signal delay effects

Active Publication Date: 2021-01-01
VIA ALLIANCE SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the transmission of the processor clock signal has high requirements on the circuit layout. Different circuit layouts cause different signal delays, and it is difficult to compensate for the signal delays.

Method used

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  • Electronic device with multiple processors and synchronization method of processors
  • Electronic device with multiple processors and synchronization method of processors
  • Electronic device with multiple processors and synchronization method of processors

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Embodiment Construction

[0020] The present invention is described with reference to the drawings, wherein like reference numerals designate similar or identical elements throughout. The above-mentioned drawings are not drawn in actual scale, and are only provided to illustrate the present invention. Some aspects of the invention are described below as references to illustrate exemplary applications. This means that numerous specific details, relationships and methods are set forth to provide a complete understanding of the invention. However, one having ordinary knowledge in the relevant art will recognize that the invention can still be practiced without one or more of the specific details or otherwise. In other instances, well-known structures or operations are not listed in detail to avoid obscuring the invention. The invention is not limited by the illustrated acts or sequence of events, as some acts may occur in a different order or concurrently with other acts or events. Furthermore, not all...

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Abstract

The invention relates to an electronic device with multiple processors and a synchronization method of the processors. The electronic device comprises a first processor, a second processor and a communication interface. The first processor operates according to a first clock and has a first time stamp counter for counting the first clock to obtain a first count value. The second processor operatesaccording to a second clock and has a second time stamp counter for counting the second clock to obtain a second count value. The communication interface is coupled between the first processor and the second processor. The first processor periodically transmits the first count value to the second processor through the communication interface. When the second processor receives the first count value, the second processor adds a preset deviation value and the received first count value of the first processor to obtain a synchronization value, resets the second count value, and then reads an addition result of the synchronization value and the second count value for synchronization.

Description

technical field [0001] The present invention relates to an electronic device, in particular to an electronic device with multiple processors and a synchronization method among the multiple processors in the electronic device. Background technique [0002] In today's applications, it is normal for an electronic device to have at least two or more processors, and the multiple processors, especially processors located on different sockets, often each have a different clock source. Although the processor clocks on which the plurality of processors operate have the same frequency, they come from different clock sources, which will also cause the count values ​​of the respective processor clocks of the plurality of processors to be different. Therefore, it is an important issue to avoid the interruption or downtime of the program running due to the difference in count value of the clocks of the respective processors among the plurality of processors. In the existing synchronizati...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/12G06F13/42
CPCG06F1/12
Inventor 司徒加旻黄振华石阳吴骏
Owner VIA ALLIANCE SEMICON CO LTD
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