[0015]The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.
[0016]The following describes the implementation of the present disclosure through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. The present disclosure can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that the following embodiments and the features in the embodiments can be combined with each other if there is no conflict. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present disclosure.
[0017]It is to be noted that various aspects of embodiments within the scope of the appended claims are described below. It should be obvious that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and/or function described herein are only illustrative. Based on the present disclosure, those skilled in the art should understand that one aspect described herein can be implemented independently of any other aspects, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement devices and/or methods of practice. In addition, other structures and/or functionalities other than one or more of the aspects set forth herein may be used to implement this device and/or practice this method.
[0018]It should also be noted that the illustrations provided in the following embodiments only illustrate the basic idea of the present disclosure in a schematic manner. The figures only show the components related to the present disclosure rather than the actual implementation of the number, shape and number of components. For size drawing, the type, quantity, and proportion of each component can be changed at will during actual implementation, and the component layout type may also be more complicated.
[0019]In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the aspects may be practiced without these specific details.
[0020]Such asfigure 1 As shown, an embodiment of the present disclosure provides a multi-chip debugging device 100 including a controller 10, a cascade control module 20, and a bus 30.
[0021]The controller 10 is used to communicate with an external host computer through the chip connection interface, and based on the signal received from the chip connection interface, generate a debugging signal containing the address of the chip to be debugged and a debugging instruction. In one embodiment, the chip connection interface may be a JTAG interface.
[0022]The cascade control module 20 is used to receive the debug signal output by the controller, adjust the debug signal by using a buffer driver, and convert the chip connection interface signal carried by the adjusted debug signal into a slave interface of the chip to be debugged. The bus slave interface signal.
[0023]The bus 30 is connected with all chips to be debugged, and is used to obtain the debug signal output by the cascade control module and converted into the bus slave interface signal, and transmit the debug instruction to the chip to be debugged indicated by the address of the chip to be debugged based on the debug signal. In one embodiment, the bus includes a set of low-speed configuration buses connected with the cascade control module and multiple sets of high-speed differential buses connected with the chip to be debugged. The bus may be a gigabit network cable. In one embodiment, the bus may transmit serdes signals (high-speed serial signals), and may be an HDMI cable or a MiniSAS cable.
[0024]In the above-mentioned multi-chip debugging device, the signal is enhanced by adding a buffer driver on the chip cascade, and the added buffer signal ensures that the debugging signal will not be attenuated in the cascaded transmission between the chips. Theoretically, the number of cascades can also be unlimited And the entire connection topology can adopt a daisy chain structure, that is, use one wire to connect all chips in series, which has the advantages of simple wiring and easy maintenance, and is suitable for online debugging of a large number of cloud chips.
[0025]In one embodiment, such asfigure 2As shown, the controller 10 includes a logic unit 11 and a multitasking unit 12.
[0026]The logic unit is connected with the chip connection interface, and is used for receiving the debugging instruction sent by the upper computer, and sending the corresponding debugging signal according to the debugging instruction.
[0027]The multitasking unit has an input interface and an output interface. The input interface is connected to the logic unit, and the output interface is connected to the corresponding cascade control module interface. The multitasking unit establishes a transmission channel with the corresponding chip to be debugged according to the debugging signal, so that the debugging signal can debug the chips.
[0028]In an embodiment, the chip connection interface may be any one of a UART interface, an SPI interface, a JTAG interface, a USB interface, and an EARTHNET interface.
[0029]In one embodiment, the cascade control module 20 includes a control signal conversion unit, a data signal conversion unit, a buffer driver, a master interface and a slave interface.
[0030]The control signal conversion unit is used for converting the control signal in the debugging signal transmitted in the master interface into the slave interface control signal.
[0031]The data signal conversion unit is used for converting the data signal in the debugging signal transmitted in the master interface into the data signal of the slave interface.
[0032]The buffer driver is used for signal enhancement of the debug signal, slave interface control signal or slave interface data signal transmitted in the master interface.
[0033]The main interface is respectively electrically connected with the control signal conversion unit and the data signal conversion unit, and is used for transmitting the debugging signal to the control signal conversion unit and the data signal conversion unit.
[0034]The slave interface is respectively electrically connected with the control signal conversion unit, the data signal conversion unit and the second bus, and is used for transmitting the slave interface control signal or the slave interface data signal to the second bus.
[0035]The embodiment of the present disclosure also provides a multi-chip debugging method, including the following steps:
[0036]The controller is used to communicate with the external host computer through the chip connection interface, and based on the signal received from the chip connection interface, a debugging signal containing the address of the chip to be debugged and debugging instructions is generated;
[0037]The cascade control module is used to receive the debugging signal output by the controller, and the buffer driver is used to adjust the debugging signal, and the chip connection interface signal carried by the adjusted debugging signal is converted into a bus that can be accessed from the slave interface of the chip to be debugged Slave interface signal;
[0038]The bus is used to obtain the debug signal output by the cascade control module and converted into the bus slave interface signal, and based on the debug signal, the debug instruction is transmitted to the chip to be debugged indicated by the chip address to be debugged.
[0039]The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present disclosure. All should be covered within the protection scope of this disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.
