A DC voltage drop analysis method and system for a system-level integrated circuit

An integrated circuit, DC voltage drop technology, applied in electrical digital data processing, instrumentation, computing and other directions, can solve the problems of high time cost, huge memory and CPU time, etc.

Active Publication Date: 2021-04-02
北京智芯仿真科技有限公司
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

For system-level VLSI with multi-scale structure, high-quality meshing is performed on the area where the entire system-level VLSI is located, and the number of meshing nodes generated will reach tens of millions or even hundreds of millions It is difficult to directly solve the finite element sparse matrix with tens of millions or even hundreds of millions of unknowns formed by the grid. Even if it can be solved, it will require huge memory and CPU time. For the design of system-level VLSI Therefore, how to provide a high-precision and fast solution method to quickly and accurately analyze the DC voltage drop of system-level VLSI has become an urgent technical problem to be solved.

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  • A DC voltage drop analysis method and system for a system-level integrated circuit
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  • A DC voltage drop analysis method and system for a system-level integrated circuit

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Embodiment Construction

[0049] The purpose of the present invention is to provide a DC voltage drop analysis method and system for a system-level integrated circuit, so as to realize fast and accurate analysis of the DC voltage drop for a system-level VLSI.

[0050] In order to make the above objects, features and advantages of the present invention more comprehensible, the invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0051] In order to solve the above problems, the present invention proposes a DC voltage drop analysis method for system-level integrated circuits. The analysis method is a method for quickly and accurately analyzing the DC voltage drop of system-level VLSI in combination with star-delta transformation. The method also performs meshing for complex integrated circuit layouts with multi-scale structures ranging from centimeters to nanometers. For field-based problems, the finite element method is used to write...

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Abstract

The invention discloses a direct current voltage drop analysis method and system of a system-level integrated circuit. The method first divides the system-level integrated circuit into a plurality of subsystems, and when analyzing the mth subsystem, analyzes the mth subsystem. All subsystems outside are regarded as a system to be processed; the field of each subsystem is meshed, and the points where the external circuits of the subsystem and the vias of other subsystems are connected to the field are added to the meshing node, the meshing nodes are uniformly numbered to form a unified finite element sparse matrix; the star-triangle transformation method is used to eliminate the internal nodes of the system to be processed in the finite element sparse matrix, and the sparse matrix for analyzing the mth subsystem field is obtained, Only the mth subsystem is solved instead of the sparse matrix of the entire system field, which greatly simplifies the solution process. On the basis of ensuring the solution accuracy, the solution speed is improved, and the DC voltage drop of the system-level VLSI is realized. Perform fast and accurate analysis.

Description

technical field [0001] The invention relates to the technical field of system-level integrated circuit analysis, in particular to a method and system for analyzing DC voltage drop of system-level integrated circuits. Background technique [0002] The DC voltage drop analysis of system-level VLSI is an important task in the back-end verification of integrated circuits. In the design process of the current system-level VLSI, the core power supply voltage of the devices in the integrated circuit continues to decrease, and the tolerance of the allowable voltage is getting smaller and smaller, but the operating current and wiring density of the integrated circuit are getting larger and larger. As a result, the DC voltage drop problem has become increasingly prominent. If the DC voltage drop problem is not considered in the design process of the system-level VLSI, it is likely that the noise margin of the system will decrease due to the DC voltage drop problem, and a small distur...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/398
CPCG06F30/398
Inventor 唐章宏邹军汲亚飞王芬黄承清
Owner 北京智芯仿真科技有限公司
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