A memory virtualization method and system under the Shenwei architecture

Abstract

The invention relates to a memory virtualization method and system under the Shenwei architecture. The method includes: establishing a buffer for storing the base address of the shadow page table; when a TLB miss occurs when the CPU queries the TLB, the CPU accesses the buffer to obtain the base address of the shadow page table of the current process, and loads the base address of the shadow page table into the memory The management unit starts the page table query; when the mapping is missing in the page table query, the CPU switches the client context to the host context for page fault interrupt processing; directly fill in the virtual and real address translation mapping obtained after the page fault interrupt processing The corresponding TLB implements TLB prefetching; the CPU queries the TLB again to complete the address translation from the virtual address of the guest to the physical address of the host. Based on the TLB feature managed by the Shenwei architecture software, the invention realizes the simultaneous refresh of the shadow page table and the TLB, thereby realizing the synchronization of the shadow page table and the client process page table.

Description

technical field [0001] The invention relates to the field of Shenwei architecture virtualization, in particular to a method and system for realizing efficient memory virtualization under the Shenwei architecture. Background technique [0002] As a typical representative of domestic processors, Shenwei family processors have attracted much attention. The great success of the supercomputer Sunway TaihuLight has established Shenwei's pivotal position in the field of domestic processors. Especially in the government and other parts with high security and independent controllability, Shenwei servers are very popular and are mainly used in desktop office systems. The first-generation Sunway architecture instruction set originated from the Alpha instruction set. After continuous improvement and development, it has developed into an independent Sunway instruction set. [0003] Compared with the international mainstream computer processor architecture (such as x86), the Shenwei arc...

AI Technical Summary

Problems solved by technology

These two solutions are implemented on mainstream processor architectures such as x86, but neither is suitable for Shenwei architecture processors.

As far as the extended page table model is concerned, it essentially uses hardware to efficiently complete two-layer address translation, but the Shenwei architecture lacks hardware support. If the model is implemented purely in software, the performance cannot meet the needs of production and life.

In addition, compared with the traditional shadow page table, the extended page table model reduces the processing overhead of page fault interrupts, but it introduces additional page table query overhead

[0007] As far as the traditional shadow page table model is concerned, on the one hand, due to the synchronization mechanism of write protection, the code implementation is extremely complex and inefficient; on the other hand, it cannot take advantage of the unique software flexibility of Shenwei architecture

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