Memory virtualization method and system under Shenwei architecture

Abstract

The invention relates to a memory virtualization method and system under a Shenwei architecture. The method comprises the following steps: a buffer area for storing a shadow page table base address isbuilt; when the CPU queries that the TLB misses, the CPU accesses the buffer area to obtain a shadow page table base address of the current process, loads the shadow page table base address into a memory management unit, and starts page table query; when mapping missing occurs in the page table query, the CPU switches the client context to the host context to perform page missing interrupt processing; the corresponding TLB directly fills the virtual-real address conversion mapping obtained after page missing interrupt processing to realize TLB prefetching; and the CPU inquires the TLB again to finish the address conversion from the virtual address of the client to the physical address of the host. Based on the TLB characteristic of Shenwei architecture software management, the shadow pagetable and the TLB are refreshed at the same time, and therefore synchronization of the shadow page table and the client process page table is achieved.

Description

technical field [0001] The present invention relates to the field of virtualization of Shenwei architecture, in particular to a method and system for realizing efficient memory virtualization under Shenwei architecture. Background technique [0002] The Shenwei family processor is a typical representative of domestic processors, and its development has attracted much attention. The great success of the supercomputer Sunway TaihuLight has established Shenwei's pivotal position in the field of domestic processors. Especially in government and other sectors with high security and self-controllability, Shenwei servers are favored and are mainly used in desktop office systems. The first generation of Shenwei architecture instruction set originated from the Alpha instruction set, and after continuous improvement and development, it has developed into an independent Shenwei instruction set. [0003] Compared with the international mainstream computer processor architecture (such ...

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Problems solved by technology

These two solutions are implemented on mainstream processor architectures such as x86, but neither is suitable for Shenwei architecture processors.

As far as the extended page table model is concerned, it essentially uses hardware to efficiently complete two-layer address translation, but the Shenwei architecture lacks hardware support. If the model is implemented purely in software, the performance cannot meet the needs of production and life.

In addition, compared with the traditional shadow page table, the extended page table model reduces the processing overhead of page fault interrupts, but it introduces additional page table query overhead

[0007] As far as the traditional shadow page table model is concerned, on the one hand, due to the synchronization mechanism of write protection, the code implementation is extremely complex and inefficient; on the other hand, it cannot take advantage of the unique software flexibility of Shenwei architecture

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