Data addressing method, storage device, chip and data storage system

Abstract

The invention discloses a data addressing method, a storage device, a chip and a data storage system, and the data addressing method comprises the steps: configuring a mapping relation between a firstbase address register and a memory space, and transferring the data received by the first base address register to the memory space having the mapping relation with the first base address register. The technical scheme of the invention has the following beneficial technical effects: in the embodiment of the invention, on one hand, the software and hardware matching design achieves the purpose ofcarrying out large-range soc internal addressing only by virtue of an upper computer without intervention of a CPU in the soc of the Pcie endpoint equipment; on the other hand, the upper computer canconfigure the mapping address of the second base address register to the first base address register and the size of the storage space through the second base address register so as to achieve the purpose of sliding the window; and the two first base address registers can enable the upper computer to access a register space in a Pcie endpoint device chip, so that large-range soc internal addressing is carried out between the upper computer and the Pcie endpoint device.

Description

technical field [0001] The invention relates to the technical field of data processing, in particular to a data addressing method, a storage device, a chip and a data storage system. Background technique [0002] Under the basic pcie protocol, the host computer addressing PCie endpoint devices only supports fixed base address register space addressing. Although the base address register can be set to GB-level space, due to the memory limitation of the host computer, the address range that can be reserved for the host computer is only It can be in the order of MB, so addressing the Pcie endpoint device through the host computer can generally only address the space in the order of MB. [0003] For the situation where the host computer needs to be used to address PCie endpoint devices in a large range, DMA (DirectMemoryAccess memory direct access) is generally used for addressing, which is suitable for using a small amount of base address register space for instruction interact...

AI Technical Summary

Problems solved by technology

Therefore, DMA addressing is only suitable for the transfer between the upper computer and the Pcie endpoint device of a large continuous code, and it will be extremely time-consuming when the short data is transferred.

In addition, if you need to start the whole chip through the pcie interface, if you use DMA addressing, the power-on scheme of the chip will be extremely complicated and difficult to implement

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