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Dirty writes on power outage

A write operation and supply voltage technology, applied in the field of dirty write, can solve problems affecting the performance of memory devices, etc.

Active Publication Date: 2022-03-22
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In some applications, the material properties or response behavior of a memory cell can change over time or in the presence of power cycling, which can affect the performance of the memory device

Method used

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  • Dirty writes on power outage
  • Dirty writes on power outage
  • Dirty writes on power outage

Examples

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Embodiment Construction

[0018] In some memory devices, the memory cell architecture may store a logic state in a configurable material (eg, in a physical characteristic or property of the material), such as a chalcogenide. For example, different material properties or properties of materials can be configured based on part of a write or refresh operation, and differences in material properties or properties can be detected during a read operation to distinguish memory cells being written to a logical A state is also another logical state (eg, a logical 0 or a logical 1). In some cases, a material may be configurable to change phase between an amorphous state (eg, a reset state) and a crystalline state (eg, a set state).

[0019] In some examples, the logic state stored by the configurable material may be based on one or more parameters, such as the polarity or amplitude of a voltage across the configurable material or the direction or amplitude of a current across the configurable material during a w...

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Abstract

This application deals with dirty writes when power is off. Methods, systems, and apparatus for dirty writes on power-off are described. In an example, the described techniques may include writing memory cells of a device according to one or more parameters (e.g., reset current amplitude), where each memory cell is associated with a storage element that stores data based on The value of the material property associated with the component. Additionally, the described techniques may include: identifying an indication of power down of the device after writing to the memory cell; and prior to the power down of the device based on the Instructs to refresh the portion of the memory cell. In some cases, refreshing includes modifying at least one of the one or more parameters for a write operation of the portion of the memory cell.

Description

[0001] cross reference [0002] US Patent No. 16 / 544,669 entitled "DIRTY WRITE ON POWER OFF" filed August 19, 2019 by Sarpatwari et al., the proprietor of this patent application priority of the application, which is assigned to its assignee and is expressly incorporated herein by reference in its entirety. technical field [0003] The technical field relates to dirty writes when power is lost. Background technique [0004] The following generally relates to systems including at least one memory device, and more particularly, to enhancing memory device performance in environments subjected to power cycling. [0005] Memory devices are widely used to store information in a variety of electronic devices, such as computers, wireless communication devices, cameras, digital displays, and the like. Information is stored by programming the different states of the memory device. For example, binary devices often store one of two states, usually indicated by a logical one or a lo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/24G11C7/20
CPCG11C7/24G11C7/20G11C13/0033G11C13/0069G11C13/0097G11C13/0004G11C5/144G11C11/4096G11C11/4072G11C11/40611G11C11/40626G11C13/0038
Inventor K·萨尔帕特瓦里F·佩里兹J·陈N·迦耶拉
Owner MICRON TECH INC