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Multi-thread synthesis method and synthesis system for fpga development

A synthesis method and technology of an integrated system, applied in the field of EDA tool development, can solve the problems of long time consumption of the synthesis process, uncertainty of multi-thread operation, low processor utilization rate, etc., so as to shorten the time consumption and avoid instability. , the effect of improving stability

Active Publication Date: 2022-04-01
GOWIN SEMICON CORP LTD
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AI Technical Summary

Problems solved by technology

For the single-thread synthesis method, only one thread is executed at the same time. After the current thread ends, the running result is first written back to the netlist, and then the system assigns the task of the next thread. This method makes the utilization of the processor (CPU) The rate is very low. When the user design is relatively large, the synthesis process takes a long time
However, in the existing environment, if multiple concurrent threads are set to execute tasks in parallel, each thread will automatically write the running results back to the netlist after the end of each thread, and the output netlist will often be run after multiple synthesis processes. The results are often different, that is, multiple There is uncertainty in thread operation

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Embodiment Construction

[0023] The multi-thread synthesis method and the FPGA synthesis system of the present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0024] A thread is the smallest unit that an operating system can perform operation scheduling. It is included in a process (ie, a process) and is the actual operating unit in a process. A thread refers to a single sequence of control flow in a process. A process can run multiple threads concurrently, and each thread executes different tasks in parallel, which can improve processor utilization and reduce the running time of comprehensive operations. A...

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Abstract

The invention relates to a multi-thread synthesis method and an integrated system developed by FPGA. In the multi-thread synthesis method, at least one process is set as a multi-thread process, which can improve processor utilization and shorten the synthesis time compared with a single-thread process. And, for any one of the multi-threaded processes, the operation results corresponding to each of the threads are written back to the netlist in a specified order that has nothing to do with the chronological order in which each thread ends, which helps to avoid errors due to the different order of writing back the netlist. The resulting instability of the output results makes the results of multiple runs in different environments the same, which can improve the stability of the output results. When the synthesis system performs logic synthesis of the FPGA module, the above-mentioned multi-thread synthesis method is used to improve system stability.

Description

technical field [0001] The invention relates to the field of EDA tool development, in particular to a multi-thread synthesis method and a synthesis system for FPGA development. Background technique [0002] EDA (Electronics Design Automation, electronic design automation) is the use of computer-aided design (CAD) to complete the functional design, synthesis, verification, physical design (including layout, wiring, layout, design rule checking, etc.) of VLSI chips. ) and other process design methods. In the electronics industry, due to the increasing scale of the semiconductor industry, EDA plays an increasingly important role, and EDA tools are also used in the development of various circuits. [0003] In EDA tools, synthesis tools are used to convert modules written in hardware description languages ​​(such as Verilog HDL) into netlists (Netlist, or netlist files, connection lists), and the synthesis process can also be considered as netlist conversion. process. Using th...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/343G06F30/347G06F9/50
CPCG06F30/343G06F30/347G06F9/5027
Inventor 王宁李元策刘奎王维张青
Owner GOWIN SEMICON CORP LTD