Abnormality detection method and system for image processing circuit

Abstract

The present application relates to an anomaly detection method and system for an image processing circuit, the anomaly detection method comprising: generating a test image following a predetermined image configuration rule; providing the test image to an image processing circuit; providing a first image processing parameter for processing the test image to the image processing circuit, wherein the first image processing parameter is predetermined; testing the processed test image to judge whether the image processing circuit is abnormal or not, wherein the processed test image is an image output after the test image is processed by the image processing circuit based on the first image processing parameters. By using the anomaly detection method, the image processing circuit can be effectively monitored in real time, and too many resources cannot be consumed.

Description

technical field [0001] The present application relates to the field of chip functional safety testing, and in particular to an abnormality detection method and system for image processing circuits. Background technique [0002] With the development of automatic driving, automatic driving technology based on artificial intelligence (AI) vision has been more and more widely used. The image processing circuit (Image Signal Processor, ISP) is an important part of the self-driving system-on-chip (SOC), which can receive and process the signal of the car camera, and output high-quality images for subsequent AI vision system used. Whether the image processing circuit can efficiently provide high-quality image information for a long time has become an important prerequisite for AI vision automatic driving technology, because once the image processing circuit is abnormal, the entire SOC chip will not be able to work normally, which may cause the automatic driving process. A safety ...

AI Technical Summary

Problems solved by technology

However, this DFT technology cannot detect in real time whether the chip is running normally when the chip is in use, and therefore cannot realize real-time detection of the functional safety of the image processing circuit.

[0004] At present, parity or error detection and correction (that is, Parity / ECC) technology or redundant design technology is often used to detect errors in chips, but Parity / ECC can only find static random access memory (Static Random-Access Memory) Memory, SRAM) error, but cannot detect the logic error of the chip, the redundant design needs to consume more area resources, and the cost is higher

Therefore, neither of these two technologies is suitable for real-time and effective monitoring of the functional safety of image processing circuits.

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