A Hardware Acceleration Architecture and Method for Key Generation Based on Hash Post-Quantum Signature

A key generation and hardware acceleration technology, which is applied in the field of key generation hardware acceleration architecture based on post-hash quantum signatures, can solve the problems of low key efficiency and speed, long time consumption, etc., and achieve low latency and high hardware utilization rate, the effect of resisting power attacks

Active Publication Date: 2022-05-17
NANJING UNIV
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AI Technical Summary

Problems solved by technology

However, the disadvantage of LMS is that the efficiency and speed of key generation are very low. The key generation process is the longest part of the LMS scheme, and its delay is approximately equal to the sum of signature and verification delays. This defect constitutes The bottleneck of the application of this scheme in the actual scene, so improving its speed becomes the core of improving the performance of the algorithm

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  • A Hardware Acceleration Architecture and Method for Key Generation Based on Hash Post-Quantum Signature
  • A Hardware Acceleration Architecture and Method for Key Generation Based on Hash Post-Quantum Signature
  • A Hardware Acceleration Architecture and Method for Key Generation Based on Hash Post-Quantum Signature

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Embodiment Construction

[0043] In order to improve the key generation speed of LMS signature and reduce the time consumption of key generation, the embodiment of the present application provides a hardware acceleration architecture and method for key generation based on post-hashing quantum signature.

[0044] Such as figure 1 As shown, the first aspect of the embodiment of the present application provides a key generation hardware acceleration architecture based on post-hash quantum signature, the key generation hardware acceleration architecture includes a leaf node generation unit and a root node generation unit, and the leaf node The generating module includes an OTS public key module, a HASH_LS module and a first HASH_X module.

[0045] Such as figure 2 As shown, it is a schematic diagram of the overall structure of the hardware acceleration architecture provided by the embodiment of the present application. The OTS public key module includes p groups of parallel OTS key submodules, and p is t...

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Abstract

This application relates to the field of key generation technology, and provides a hardware acceleration architecture and method for key generation based on post-hashed quantum signatures. The hardware acceleration architecture for key generation is based on the characteristics of algorithms and parameter sets in the LMS key generation process. A high-speed and scalable hardware-accelerated architecture is designed. The architecture is designed to be applicable to all parameter sets of the LMS solution, and through moderate parallel design, low latency and high hardware utilization can be achieved at the same time. At the same time, the architecture maintains a certain constant power when different parameters are implemented, which can be To a certain extent, it helps defend against power attacks.

Description

technical field [0001] The present application relates to the technical field of key generation, in particular to a hardware acceleration architecture and method for key generation based on post-hash quantum signatures. Background technique [0002] Traditional signature algorithms (such as RSA, DSA, ECDSA, etc.) have difficulties in factoring large integers and calculating discrete logarithms. With the rapid development of the field of quantum computing, the emergence of quantum computers will break the security provided by traditional signature algorithms. Therefore, the design of encryption systems for quantum computers has become very urgent. The hash-based signature scheme (Hash-based Signature , HBS) is one of the most potential categories of post-quantum encryption schemes, in which the main calculation function is a hash function (Hash) such as SHA2 and SHA3. Compared with other post-quantum encryption schemes, such as lattice-based, homology-based, and coding-based...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L9/08H04L9/06H04L9/00
CPCH04L9/0825H04L9/0643H04L9/003H04L2209/122Y02D30/50
Inventor 王中风胡潇宋逸峰汪文浩田静
Owner NANJING UNIV
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