FPGA chip testing method, device, system and storage medium

Abstract

The embodiments of the present application are applicable to the technical field of chip testing, and provide an FPGA chip testing method, device, system, and computer-readable storage medium. The method includes: sending configuration data to the configuration chip according to the test items, so that the configuration chip burns the configuration data into the FPGA chip to be tested, and the configuration chip is set on the automatic test equipment; test response results. This application sends the configuration data to the FPGA chip under test through the configuration chip set on the automatic test equipment, which overcomes the problem that the existing automatic test equipment does not have the chip configuration function, and does not need to make FPGA chip test boards, which can be used at any time Send configuration information to the FPGA chip under test through the test software, without repeatedly powering on and off the test board, saving a lot of configuration time for FPGA chip testing and improving test efficiency.

Description

technical field [0001] The present application belongs to the technical field of chip testing, and in particular relates to an FPGA chip testing method, device, system and computer-readable storage medium. Background technique [0002] With the gradual wide application of FPGA devices in production and life, the development of process technology of FPGA devices has received more and more attention from the country. As an essential part of FPGA chip R&D and production, FPGA testing technology also needs continuous improvement to meet the testing requirements of rapidly developing FPGA chips. [0003] FPGA is a non-functional device in advance, which only includes a large number of repetitive IOBs (input and output modules), CLBs (configurable logic blocks) and wiring channels and other uncomplicated basic units. At present, automatic test equipment (ATE) is mainly used to test FPGA. However, the number of FPGA pins ranges from hundreds to thousands. Every time the FPGA is c...

AI Technical Summary

Problems solved by technology

As the scale of the FPGA increases, the number of FPGA configurations will increase exponentially, and the traversal test of the internal resources of the FPGA will also be extremely time-consuming. Although it can be achieved in theory, it is difficult to apply it in production.

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