A visual computer-aided chip design and simulation verification method and system
A computer-aided and simulation verification technology, applied in computer-aided design, calculation, instruments, etc., can solve problems such as slow calculation speed, slow circuit simulation speed, and inability to fully simulate, so as to improve accuracy, ensure accuracy, and improve simulation Verify the effect of speed
Active Publication Date: 2021-11-23
BATELAB CO LTD
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However, if the simulated circuit is a complex circuit, the calculation speed of such a matrix in related technologies will be very slow due to the large amount of matrix data obtained after the matrix conversion of the complex circuit, and correspondingly, the circuit simulation speed is also very slow
In addition, the simulation in the EDA software is after all calculated by the computer, and the computer cannot completely simulate all the parameters that exist in the actual situation during the calculation process. Therefore, there is a large possibility of error between the calculated simulation results and the actual situation.
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[0054] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. Apparently, the described embodiments are only some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0055] The terms "first", "second", "third", and "fourth" in the specification and claims of this application and the above drawings are used to distinguish different objects, rather than to describe specific order. Furthermore, the terms "comprising" and "having", and any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or device comprisin...
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The application discloses a visual computer-aided chip design and simulation verification method and system. Wherein, the method includes generating a virtual circuit structure in response to a user's circuit design instruction on a visualization page. The virtual circuit structure is converted into a control signal conforming to a preset format condition, and a decoding method matching the preset format condition is used to decode the control signal, and a circuit adjustment signal is generated according to the decoding result. The circuit adjustment signal is sent to the physical circuit generator of the integrated circuit components. Based on the circuit adjustment signal, the physical circuit generator adjusts the connection relationship between each circuit component integrated on it and each node to generate Physical circuit structure for simulation verification operation. The application can effectively improve the efficiency of circuit simulation verification and improve the accuracy of circuit simulation verification results.
Description
technical field [0001] The present application relates to the technical field of electrical digital data processing, in particular to a visual computer-aided chip design and simulation verification method and system. Background technique [0002] EDA (Electronic Design Automation, Electronic Design Automation) technology uses computers as tools. Designers use the hardware description language VHDL to complete design files on the EDA software platform, and then the computer automatically completes logic compilation, simplification, segmentation, synthesis, and optimization. , layout, routing and simulation, as well as adaptation compilation, logic mapping and programming download for specific target chips. This technology can greatly improve the efficiency and operability of circuit design, and reduce the labor intensity of designers. Related technologies are currently designing and simulating circuits in EDA software. [0003] The method of performing circuit simulation in...
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IPC IPC(8): G06F30/367
CPCG06F30/367G06F30/31
Inventor 不公告发明人
Owner BATELAB CO LTD