Techniques for dynamically compressing memory regions having a uniform value

A technology of memory and memory location, applied in memory system, instrument, memory address/allocation/relocation, etc., can solve the problems of ZBC compression performance limitation and difficulty

Active Publication Date: 2021-11-05
NVIDIA CORP
View PDF8 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, existing ZBC mechanisms have at least two disadvantages
The performance of ZBC compression is limited by the capacity of the global unified table
When all entries have been used to store values, it is difficult (e.g., time-consuming) to reclaim or free any entries to store new values, even if no longer referencing a particular value in the table

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Techniques for dynamically compressing memory regions having a uniform value
  • Techniques for dynamically compressing memory regions having a uniform value
  • Techniques for dynamically compressing memory regions having a uniform value

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0020] Conventional Zero Bandwidth Clear (ZBC) mechanisms rely on a single global unified table. Therefore, the number of distinct values ​​available to flush the buffer to a uniform value via ZBC compression is limited to the number of entries in the global uniform table. As described further herein, conventional ZBC mechanisms are enhanced, for example, by extending the number of values ​​available for ZBC encoding beyond the on-chip storage limit.

[0021] Figure 1A An exemplary system including a processor 120 and a memory 110 according to an embodiment of the disclosure is shown. In the context described below, a region is a portion of memory associated with a local uniform table (eg local uniform table 111 or 112). All regions are associated with a global consolidated table (eg, global consolidated table 105). Multiple regions may be defined within a memory such as memory 110 . In one embodiment, all regions are of equal size. In another embodiment, the regions may ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses techniques for dynamically compressing memory regions having a uniform value. Accesses between a processor and its external memory is reduced when the processor internally maintains a compressed version of values stored in the external memory. The processor can then refer to the compressed version rather than access the external memory. One compression technique involves maintaining a dictionary on the processor mapping portions of a memory to values. When all of the values of a portion of memory are uniform (e.g., the same), the value is stored in the dictionary for that portion of memory. Thereafter, when the processor needs to access that portion of memory, the value is retrieved from the dictionary rather than from external memory. Techniques are disclosed herein to extend, for example, the capabilities of such dictionary-based compression so that the amount of accesses between the processor and its external memory are further reduced.

Description

technical field [0001] The present disclosure relates to dictionary-based compression, and more particularly, to scalable dictionary-based compression. Background technique [0002] Conventionally, the Zero Bandwidth Clear (ZBC) command is used to associate a single value with multiple locations in memory without actually writing the value to each memory location. This association is done by storing a single value (called a uniform value) in a global uniform table at a particular index in the table, and associating that index with multiple memory locations. Thereafter, when a value needs to be read from one of the plurality of memory locations, the value is retrieved from the global uniform table using the index associated with that memory location. These memory locations are in off-chip memory, so actually reading values ​​from or writing values ​​to memory locations consumes memory access bandwidth. In contrast, the global unified table is usually stored on-chip. Thus, ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/02G06F12/06G06F12/0802G06F12/0891
CPCG06F12/0292G06F12/0646G06F12/0802G06F12/0891H03M7/42H03M7/70H03M7/4056G06F3/0608H03M7/3088G06F3/0673G06F3/0659
Inventor R·兰根S·帕蒂达尔P·克里希纳穆尔蒂W·A·甘地
Owner NVIDIA CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products