Redundant resource comparator, bus structure, circuit and corresponding comparison method

Abstract

The invention relates to a redundant resource comparator, a bus structure, a circuit and a corresponding comparison method. The invention discloses a redundant resource comparator of a bus structure of a memory device. The redundant resource comparator is used for comparing an address signal received from an address signal bus with a redundant address stored in a latch of the memory device. The invention also discloses a corresponding bus structure and a comparison method.

Description

technical field [0001] The present disclosure relates to a redundancy resource comparator of a bus architecture, a bus architecture of a memory device implementing an improved comparison method, and a corresponding comparison method. Background technique [0002] In a computer or memory device, a bus is the communication system that transfers data between components. The bus may be a parallel bus that carries data words in parallel on multiple wires. [0003] Memory devices often include different buses for different specific actions. In particular, it is known to provide a memory device having a bus structure dedicated to comparing address signals with pre-stored redundant signals in order to verify the input of an array of memory cells intended as the memory device The signal provided by the signal. [0004] figure 1 A bus structure for redundant address comparison implemented according to the prior art is shown. [0005] The redundant address comparison bus structure...

AI Technical Summary

Problems solved by technology

[0020] Therefore, if figure 1 The standard bus structure of the bus structure shown involves huge current consumption and will require huge current consumption in the future

Images