Write verification circuit applied to STT-MRAM
A verification circuit and circuit technology, applied in the field of write verification circuits, can solve the problems of increased power consumption of write operations, large write operation time margin, etc., and achieve the effects of reducing power consumption and simplifying the process of writing operations
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Embodiment 1
[0062] This embodiment provides a write verification circuit applied to STT-MRAM, the circuit includes: a write operation completion detection circuit and a write self-termination circuit; the write operation completion detection circuit is used to determine whether the write operation is completed, and generate a detection Feedback signal COP; the write self-termination circuit generates a write operation signal and a write operation termination signal according to the detection feedback signal COP.
[0063] The write verification circuit of this embodiment is composed of a write operation completion detection circuit and a write self-termination circuit. The change of the write circuit in the STT-MRAM unit is detected by the write operation completion detection circuit, and the state of the write operation is monitored in real time. Once the write operation is detected, the feedback signal COP is immediately applied to the write self-termination circuit to turn off the write ...
Embodiment 2
[0065] This embodiment provides a write verification circuit applied to STT-MRAM, and a write operation verification function of STT-MRAM is realized by a write operation completion detection circuit and a self-write termination circuit.
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