Logic controller for nonvolatile memory

Abstract

The present invention discloses a logic controller for a nonvolatile memory. The logic controller comprises a mode selection module, an electrify logic module, a data read-write module, an automatic detection module and a test control module, wherein the mode selection module is provided for generating a work state and a work mode, the electrify logic module completes sequential loading of trimming data 1 under a user state, automatic adjustment on the trimming data 1 and single-step debugging under a test state, the test control module completes manual testing on trimming data 2 comprising current and voltage under a test state and outputs the test result through a test output port, the automatic detection module is provided for automatically comparing and detecting storage array data, the data read-write module can control the high voltage generation module during a write process and complete read-write operation of the data, and the nonvolatile memory and the external modules are subjected to data exchange through debugging bus. According to the present invention, automatic operation and testing of the nonvolatile memory can be achieved, and system connection can be simplified.

Description

technical field [0001] The present invention relates to a semiconductor integrated circuit, in particular to a logic controller for non-volatile memory (NVM). Background technique [0002] Such as figure 1 As shown, it is a schematic diagram of the structure of the existing non-volatile memory, and the structure of the existing non-volatile memory includes the NVM main part 101 . [0003] The user logic signal is used to read and write the NVM through the NVM selection module 102. The writing operation is complicated and requires the user to control a series of writing control signals in a certain order according to the requirements. The operation is complicated and error-prone. [0004] If a full-chip test is required, the user also needs to add an additional test module 103. The test module 103 and the NVM main body 101 are two independent modules of the chip, which require separate design and complicated connections. The structure is complicated and the cost is high. Th...

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Problems solved by technology

The trimming data in the existing non-volatile memory needs the value maintained by the user, and the operation is complicated; the interface of the non-volatile memory is complicated, and the NVM main part 101 and external modules such as the voltage calibration module 105, the voltage detection module 106 and the clock oscillation module 107 Waiting for many connections and error-prone

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