Method and system for managing hardware command queue

Abstract

Embodiments of the present invention provide a method and system for managing hardware command queues. The commands are executed in a non-blocking manner inside the hardware queue. The hardware command queue can transmit commands that do not currently have any dependencies to the data processing module for processing. There is no need to wait for the completion of the previous command; for pending commands that have dependencies with other commands, check whether the dependent commands have been executed. If not, you can temporarily cache the command and continue to process subsequent commands. Therefore, the efficiency of data parallel processing is fully improved, and the effective synchronization between each hardware command queue is realized by using a simple mechanism, which does not require complicated software programming, and avoids invalid waiting caused by reading external storage.

Description

technical field [0001] The present invention relates to high-performance computing, and in particular, to a method and system for managing hardware command queues. Background technique [0002] The statements in this section are only for providing background information related to the technical solutions of the present application to help understanding, and they do not necessarily constitute prior art to the technical solutions of the present application. [0003] Multiple hardware command queues (also referred to as hardware queues for short) are usually included in modern high-performance computing processors to execute commands in parallel. The execution of commands in each hardware command queue usually includes three steps: command reading and parsing, command scheduling, and command distribution. [0004] Usually, within each hardware queue, commands are executed serially, that is, commands are parsed and distributed sequentially within the same hardware command queue...

AI Technical Summary

Problems solved by technology

The fence mechanism is a consumer and producer mode that requires external storage to exchange data between hardware command queues. This mechanism causes hardware delays due to access to external storage and requires software to manage external storage.

The hardware semaphore signal method is to use the internal circuit of the hardware command queue chip to transmit the semaphore signal. This method is more convenient for synchronization with a small number of queues (such as 2). Once the number of hardware command queues increases, the algorithm will be quite complicated. Difficult to efficiently synchronize hardware command queues

Moreover, the inventor also found that these synchronization mechanisms often also cause the blockage of the command queue, because once a certain command queue executes the waiting command, the command queue will stop running

It is necessary to wait until the end of the command to continue the execution of subsequent commands, even if there are no subsequent commands that do not have any dependencies, they cannot be executed

This also reduces the efficiency of the parallel computing system, especially when there are many data processing modules, the problem caused by this waiting is more obvious

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