Switch driver and DAC system including the same

A technology for switching drivers and logic devices, applied in the field of DAC systems, can solve the problems of high power consumption and high timing requirements, and achieve the effects of reducing data rate, easy data acquisition, and reducing clock signal frequency

Pending Publication Date: 2022-03-01
SANECHIPS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The main disadvantages of this switch driver architecture are high power consumption and high timing requirements

Method used

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  • Switch driver and DAC system including the same
  • Switch driver and DAC system including the same
  • Switch driver and DAC system including the same

Examples

Experimental program
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Embodiment Construction

[0030] Example embodiments will be described more fully hereinafter with reference to the accompanying drawings, but may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0031] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0032] The terminology used herein is for describing particular embodiments only and is not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It will also be understood that when the terms "comprising" and / or "consisting of" are used in this specification, the stated features, integers, steps, operations, elements and / or co...

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PUM

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Abstract

The invention provides a switch driver and a DAC system, each group of circuits is divided into two paths, each group of circuits comprises a first circuit, a second circuit and a third logic device, each of the first circuit and the second circuit comprises a first logic device and a second logic device connected with the first logic device, the clock signal frequency in each group of circuits is one half of the clock frequency; in each group of circuits, the phases of the input signals of the first circuit and the second circuit are different, the phases of the input signals of the first circuit in each group of circuits are the same, the phases of the input signals of the second circuit in each group of circuits are the same, and the first circuit and the second circuit are combined and output through a third logic device; the clock signal frequency of each group of circuits is reduced by half, and the data rate of each path in the switch driver is correspondingly reduced, so that the power consumption is reduced, the data period is doubled, the data acquisition is easier, and the time sequence requirement is correspondingly reduced.

Description

technical field [0001] The present disclosure relates to the technical field of integrated circuits, in particular to a switch driver and a DAC system including the switch driver. Background technique [0002] Current digital-to-analog converter (DAC) systems such as figure 1 As shown, including data link (Data Path), clock link (CLK Path) and digital-to-analog converter core circuit (DAC Core). The data link includes interface circuit (Interface), digital data link (Digital Data Path), decoder (Decoder), serializer (Serializer) and switch driver (Switch Driver), and the clock link includes clock receiver (Clock Receiver), delay-locked loop (DLL), frequency divider (Divider) and some clock drivers, etc. For the DAC system, the switch driver in the data link is the main power consumption module, and the switch driver and the digital-to-analog converter core circuit have the greatest impact on the linearity of the DAC. [0003] In the data link, the input digital signal is ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K17/08H03K17/687
CPCH03K17/08H03K17/687H03K19/20H03M1/74H03M1/66
Inventor 罗豪常云峰陈玉虎朱文涛
Owner SANECHIPS TECH CO LTD
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