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HEVC (High Efficiency Video Coding) standard-based intra-frame prediction mode parallel hardware method

An intra-frame prediction mode and hardware technology, applied in the field of video encoding and decoding, can solve problems such as occupation, large hardware area, and speed reduction, and achieve the effect of optimized circuit design, good circuit design, and accurate mode number

Active Publication Date: 2022-03-18
FUZHOU UNIV
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  • Application Information

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Problems solved by technology

[0007] It can be seen that the purpose of the existing technical solutions is to reduce the time spent on selecting the best prediction mode for intra prediction, but if it is applied in hardware design, the calculation of its image texture direction features has a certain degree of difficulty in hardware design. There are great restrictions, that is, if you want to be fast, you need a lot of parallelism, which will take up a lot of hardware area and power consumption, and if you want to reduce the area, the speed must be greatly reduced

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  • HEVC (High Efficiency Video Coding) standard-based intra-frame prediction mode parallel hardware method
  • HEVC (High Efficiency Video Coding) standard-based intra-frame prediction mode parallel hardware method
  • HEVC (High Efficiency Video Coding) standard-based intra-frame prediction mode parallel hardware method

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[0032] The technical solution of the present invention will be specifically described below in conjunction with the accompanying drawings.

[0033] The present invention is an HEVC standard-based intra-frame prediction mode parallel hardware method, which divides 35 intra-frame prediction modes into 9 parallel calculations under the condition of minimizing the hardware area and operation unit, and realizes it within 5500 clock cycles Intra-frame prediction of a CTU can be completed.

[0034] The purpose of the present invention is to speed up the calculation of 35 prediction modes of a PU during the hardware design of intra-frame prediction. Through the scheme of rationally allocating modes in parallel, the speed is improved and the hardware area is minimized.

[0035]The 35 modes of intra-frame prediction are numbered from 0 to 34, wherein mode No. 0 is the Planar mode, mode No. 1 is the DC mode, and modes No. 2 to 34 are angle prediction modes. The 35 patterns are divided ...

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Abstract

The invention relates to an intra-frame prediction mode parallel hardware method based on an HEVC (High Efficiency Video Coding) standard. According to the method, through a scheme of reasonably distributing parallel modes, hardware complexity can be reduced and hardware resources can be saved in a hardware implementation process, and intra-frame prediction of one CTU can be completed in 5500 clock cycles under pipeline design.

Description

technical field [0001] The invention belongs to the technical field of video encoding and decoding, and relates to an HEVC standard-based intra-frame prediction mode parallel hardware method. Background technique [0002] Video coding, as the name suggests, refers to encoding and compressing video data by certain means under the premise of ensuring a certain video quality, so as to reduce the amount of data required for video storage and sending and receiving. In this digital age with rapid development of information technology, video data is growing explosively. For example, the video resolution has developed from the commonly used 720P to the current maximum 8K, and the frame rate has changed from a dozen frames to the commonly used 60 frames or even higher. . With the rapid development of video quality, video coding technology has also gone through many generations of international standards. Among them, the new generation of high efficiency video coding (high efficiency...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N19/436H04N19/593H04N19/11H04N19/61H04N19/117
CPCH04N19/436H04N19/593H04N19/11H04N19/61H04N19/117
Inventor 林志坚丁永强杨秀芝程勇
Owner FUZHOU UNIV