Implementation method and device for PCIe function level reset, computer equipment and storage medium

Abstract

The invention relates to a PCIe function level reset implementation method and device, computer equipment and a storage medium. The method comprises the steps that an SSD obtains an FLR interrupt signal sent by an SSD controller, and firmware jumps to an interrupt processing function to process an FLR event; the SSD returns to the main state machine to enter a reset state and terminates the ongoing command; after all the commands are terminated normally, the firmware sends an NVMe core reset request to an SSD controller; the SSD carries out initialization of the NVMe; the firmware writes the FLR to the SSD controller completely and waits for the hardware to report that the FLR is completed, and the SSD reconfigures the PCIe register. According to the method and the device, the problem of FLR test failure on a sanblaze test platform can be solved, and the test efficiency can be effectively improved.

Description

technical field [0001] The invention relates to the technical field of solid-state hard disks, in particular to a method, device, computer equipment and storage medium for implementing PCIe function level reset. Background technique [0002] At present, PCIe function level reset (Function Level Reset, hereinafter referred to as FLR) is triggered by the host software writing bit15 (init flr) of the Device control register (device control register) of PICe, and FLR needs to be completed within 100ms. FLR only resets the internal state and registers of the corresponding Function, and does not affect the link-specific registers. [0003] However, the existing FLR solution failed the FLR test on the sanblaze (a SSD test software) test platform. Because the SSD is performing read and write commands on this platform, the host sends the FLR request before the end of the read and write commands. When the FLR is interrupted, the NVMe Core (core) is reset during the interruption, caus...

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Problems solved by technology

[0003] However, the existing FLR solution failed the FLR test on the sanblaze (a SSD test software) test platform. Because the SSD is performing read and write commands on this platform, the host sends the FLR request before the end of the read and write commands. When the FLR is interrupted, the NVMe Core (core) is reset during the interruption, causing the nodes that have not been processed to be stuck, unable to complete smoothly, and the final test fails

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