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Method for realizing data transmission through custom 100G interface

A data transmission and self-defining technology, applied in electrical digital data processing, instruments, etc., can solve the problems of high consumption of logic resources, difficult implementation, complex interface protocols, etc., to save logic resources, reduce development difficulty, and be widely used. effect of value

Pending Publication Date: 2022-05-10
TOEC TECH
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Problems solved by technology

[0004] In view of the problems existing in the prior art, the present invention provides a method for realizing data transmission through a self-defined 100G interface. question

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  • Method for realizing data transmission through custom 100G interface
  • Method for realizing data transmission through custom 100G interface
  • Method for realizing data transmission through custom 100G interface

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Embodiment Construction

[0027] The present invention will be further described below in conjunction with accompanying drawing:

[0028] figure 1 It is a schematic diagram of the physical channel of the 100G interface of the present invention. It can be seen from the figure that the number of physical channel lanes of the interface is 4, which are lane0, lane1, lane2, and lane3 from top to bottom, and data is transmitted in the lane according to the frame frame. Each frame contains 1536 BLOCKs. For example, the first BLOCK in lane0 is the align marker, the second BLOCK is BLOCK0_1, ..., the 1536th BLOCK is BLOCK0_1535, and the rest of the channels are similar. BLOCK is the basic granularity of data transmission, with a bit width of 85 bits. The align marker is the BLOCK transmitted at the beginning of each frame. It is an alignment mark and is used for alignment between channels. It is stipulated that the transmission rate of each physical lane is 27.9525gbps, and the interface transmission The rate ...

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Abstract

The invention relates to a method for realizing data transmission through a user-defined 100G interface, the method is realized on a hardware platform based on an FPGA (Field Programmable Gate Array), the physical channel lane number of the 100G interface is 4, the transmission basic granularity BLOCK is 85b, the transmission is carried out according to a frame, one frame comprises 1536 BLOCKs, the initial BLOCK of each frame is used for an alignment mark between channels, and the initial BLOCK of each frame is used for the alignment mark between the channels. And the bip5 in the align marker field is used for checking the previous frame of data, scrambling is carried out on each physical channel according to frames in order to ensure the direct current balance characteristic of high-speed transmission, and 10 paths of 10G signals are arranged in BLOCK of each lane according to fixed positions. The problem of logic complexity achieved when 10G signals are loaded to conduct 100G transmission between boards is solved, logic resources can be greatly saved, and beneficial reference is provided for the 100G interface transmission technology.

Description

technical field [0001] The present invention relates to the technical field of 100G data transmission, in particular to a method for realizing data transmission through a self-defined 100G interface, which is mainly used for the interconnection and transmission of 10G signals with a lower carrying rate between boards. Background technique [0002] When performing 100G data interaction between boards, the usual transmission interfaces include 100GE, OTU4, etc. 100GE is mainly used for packet transmission. If you want to load 10 different 10G signals into one 100GE for transmission, you need to process each 10G signal into a packet, then aggregate the packets and then transmit them through 100GE. To separate each 10G signal, it is necessary to insert a custom identification field in the packet header. This loading method is obviously cumbersome, and for 10GE signals, it is not possible to load 10 channels of 10GE signals into one 100GE signal, because the effective transmissio...

Claims

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Application Information

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IPC IPC(8): G06F13/42G06F13/40
CPCG06F13/4204G06F13/4009G06F2213/0038
Inventor 陈晖晋巧玲
Owner TOEC TECH
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