Chip testing system and method

Abstract

The invention discloses a chip test system and method, and the system comprises a voltage conversion module which is connected with a power supply and a to-be-tested chip; a target test module, wherein the target test module is connected with the chip to be tested; the processing module is connected with the chip to be tested and the voltage conversion module; wherein the processing module is used for adjusting the voltage output by the voltage conversion module, so that the target test module can test the to-be-tested chip to output a test result.

Description

technical field [0001] The application belongs to the field of computer technology, and in particular relates to a chip testing system and method. Background technique [0002] In the field of chip test devices it is often preferred to connect a plurality of duts to a common line. Thus, the terminals of at least two duts are connected to a common channel of the chip tester. These terminals are usually designated as shared terminals. However, some of the terminals of these duts are preferably connected to the channels of the chip tester via separate (non-shared or unshared) lines. Thus, in a typical setup there are two types of terminals: shared terminals of the DUT connected to the chip tester via shared lines and unshared terminals connected to channels of the chip tester via unshared lines . [0003] However, in the prior art, it is usually necessary to set more test parts to test the chip, which results in a long time for the test chip to be tested. Contents of the ...

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Problems solved by technology

[0003] However, in the prior art, it is usually necessary to set more test parts to test the chip, resulting in a long time for the test chip to be tested.

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