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Debugging system

A technology with circuit and protection functions, which is applied in the field of debugging systems with debugging protection circuits, and can solve problems such as chip tampering, information security risks, product damage, etc.

Pending Publication Date: 2022-05-27
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, after the development is completed, the debug channel in the chip may cause hidden dangers to information security
For example, hackers may obtain confidential information inside the chip through the debugging channel, or even tamper with the chip, causing damage to the product or using the product to perform unauthorized functions

Method used

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  • Debugging system
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Examples

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Embodiment Construction

[0011] figure 1 It is a schematic diagram of a debugging system 100 according to an embodiment of the present invention. The debug system 100 may include a chip under test 110 and a debug controller 120 . The chip under test 110 may include a circuit under test 112 , a debug interface 114 , a debug access circuit 116 and a debug protection circuit 118 . In some embodiments, the chip under test 110 may be a chip under development, and the circuit under test 112 may be a block used to perform functions under development. The debug controller 120 can be selectively coupled to the debug interface 114 , such as (but not limited to) coupled to the debug interface 114 through a probe, so as to debug the circuit under test 112 in the chip under test 110 wrong.

[0012] exist figure 1 Among them, the debug access circuit 116 can be coupled to the circuit under test 112 , the debug interface 114 and the debug protection circuit 118 . In some embodiments, the debug access circuit 11...

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PUM

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Abstract

The debugging system comprises a chip to be tested and a debugging controller. The chip to be tested comprises a circuit to be tested, a debugging access circuit and a debugging protection circuit. The debug access circuit is coupled to the circuit under test, the debug protection circuit and the debug controller. When the protection function is not started, the debugging protection circuit opens communication between the debugging access circuit and the circuit to be tested, and the debugging controller accesses data of the circuit to be tested through the debugging access circuit so as to debug the circuit to be tested. When the protection function is started, the debug protection circuit blocks communication between the debug access circuit and the circuit to be tested, the debug controller transmits write-in information to the debug protection circuit through the debug access circuit, and the debug protection circuit judges whether to stop the protection function or not according to the write-in information.

Description

technical field [0001] The present invention relates to a debug system, in particular to a debug system with a debug protection circuit. Background technique [0002] In the process of developing a chip, in order to effectively grasp the operation of the chip for debugging (debug), a channel for debugging is often reserved in the chip, such as Serial Wire Debug (SWD) interface or joint testing work. The channel specified by the Joint Test Action Group (JTAG). In this way, the program developer can access the contents of the memory in the chip through these debug channels to track the operation process of the chip, and locate the abnormal position of the program for debugging. However, after the development is completed, the debug channel in the chip may pose a hidden danger of information security. For example, hackers may obtain confidential information inside the chip through the debug channel, or even tamper with the chip, causing damage to the product or using the prod...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F21/72G06F21/75
CPCG06F21/72G06F21/75G01R31/31705G01R31/31903
Inventor 王婕妤李朝明彭作辉
Owner REALTEK SEMICON CORP