Method and device for generating FW of CPLD and medium
A technology for generating codes and parameters, applied in the field of hardware development, can solve problems such as language barriers for hardware engineers, achieve the effect of eliminating language barriers and simplifying the design process
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[0037] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative work fall within the protection scope of the present application.
[0038] CPLD is a commonly used chip for motherboards. Currently, in the development of CPLD, it is necessary to use Verilog language to design the underlying source code of multiple functional modules. The workload is large, and there is a language threshold for hardware engineers. In addition, due to the readability of CPLD source code Therefore, it is inefficient and error-prone to directly rewrite the underlying source code, which is not conduci...
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