Method for simulating electrical property of wafer chip and semiconductor process method
A semiconductor and electrical technology, applied in the field of measurement in the manufacturing process of semiconductor devices, can solve the problem of not being able to detect the electrical abnormality of the semiconductor structure in time
Pending Publication Date: 2022-07-29
CHANGXIN MEMORY TECH INC
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[0005] Based on this, it is necessary to provide a method of simulating the electrical properties of a wafer chip and a semiconductor process method for the problem that the traditional measurement method cannot detect the electrical anomaly of the semiconductor structure in time
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[0037]In order to facilitate understanding of the present invention, the present invention will be described more fully hereinafter with reference to the related drawings. Preferred embodiments of the invention are shown in the accompanying drawings. However, the present invention may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that a thorough and complete understanding of the present disclosure is provided.
[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed ite...
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The invention relates to a method for simulating the electrical property of a wafer chip, and the method is characterized in that the method comprises the steps: constructing a database, the database comprises spectral data of a semiconductor structure obtained after a wafer chip is subjected to a target key process, actual electrical data of the wafer chip and a corresponding relation between the spectral data and the actual electrical data; the target key process is executed on a target wafer chip, spectral data of a semiconductor structure obtained after the target wafer chip is subjected to the target key process are obtained, and the spectral data are target spectral data; and simulating electrical data of the target wafer chip based on the acquired target spectral data and the database, wherein the electrical data is target electrical data. According to the method for simulating the electrical property of the wafer chip, the electrical property parameters of the wafer chip can be evaluated in time after the target key process, electrical property abnormity occurring in the preparation process of the wafer chip can be found in time, and waste of manpower, material resources and financial resources is reduced.
Description
technical field [0001] The invention relates to the field of measurement belonging to the manufacturing process of semiconductor devices, in particular to a method for simulating the electrical properties of a wafer chip and a semiconductor process method. Background technique [0002] In the semiconductor manufacturing process, optical line width measurement (OCD) is generally performed after some target key process steps, so as to detect in real time whether the semiconductor structure obtained by each process site is abnormal. The principle of optical linewidth measurement is: based on the coupling calculation of the geometric model spectrum and the actual measurement spectrum, the obtained geometric structure parameters of the semiconductor structure are obtained. [0003] Optical linewidth measurement can only reflect the obtained geometrical parameters of the semiconductor structure (eg, height, linewidth or depth, etc.), and cannot directly obtain electrical parameter...
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Login to View More IPC IPC(8): H01L21/66
CPCH01L22/14H01L22/00
Inventor 李弘祥王士欣
Owner CHANGXIN MEMORY TECH INC