Occupation of waiting pipeline type bus reguirement
A pipelined, microprocessor-based technology, applied in the address formation of the next instruction, instruments, calculations, etc., can solve problems such as slowing down the speed of the microprocessor 100
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[0077] In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment will be described in detail below together with the accompanying drawings.
[0078] Figure 4 A microprocessor according to the invention is shown. Fetch unit 410 is connected to decode unit 415 , vector request signal 465 , and branch request signal 470 . The decode unit 415 is connected to the execution unit 420 . Execution unit 420 is connected to data memory access unit 425 and back to read unit 410 . The data memory access unit 425 is connected to a register write-back unit 430 and a memory 460 . The register file 405 is connected to the read unit 410 , the decode unit 415 , the execute unit 420 , and the register write-back unit 430 . Communication between units is maintained.
[0079] The bus interface unit 435 communicates with the fetch unit 410 using a memory request 440 , also referred to as a read request 440 , addr...
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