Method and apparatus for accelerating processor to read and write scratch memory

A technology for accelerating processors and temporary registers, applied in program control devices, electrical digital data processing, instruments, etc., can solve the problems of processor development dilemma, inability to meet reading and writing requirements, and resource consumption of built-in ICE.

Inactive Publication Date: 2004-06-16
WINBOND ELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0004] However, the performance of the above-mentioned external ICE method in reading and writing the scratchpad is obviously not good, mainly because the internal data transfer instruction (MOV) used by the processor to read and write the internal scratchpad usually only needs one machine cycle (MACHINECYCLE). The external data transfer instruction (MOVX) used by the extended memory requires two machine cycles
And the MOVX data transmission instruction is executed. After the operation of the accumulator (ACC) is completed, it is written back (WRITE BACK) to the original scratchpad, which affects its read and write speed eve...

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  • Method and apparatus for accelerating processor to read and write scratch memory
  • Method and apparatus for accelerating processor to read and write scratch memory
  • Method and apparatus for accelerating processor to read and write scratch memory

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Embodiment Construction

[0021] Firstly, in the present invention, the processor is externally connected with an expansion memory to establish an expansion temporary register. In this embodiment, an 8051 processor is used as an example. The address of the extended temporary register in the external memory is mapped to the idle address of the special function register (SFR) built in the processor by means of memory mapping (MEMORY MAPPING).

[0022] The SFR is a 128-byte (Bytes) (80H~FFH) memory area that can be directly addressed (see Figure 1). In addition to its own multiple sets of temporary registers, there are still many idle addresses. Therefore, the present invention maps the address of the expansion temporary register to the idle address of the SFR, so that in the normal operation mode, the expansion temporary register is simulated as an internal temporary register, and then the internal data transfer command can be used to read and write the expansion register. Compared with the method of rea...

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Abstract

The invention relates to a method to accelerate processor to read/write register and its device, mainly using processor to externally connect up with an extended memory and adopting MEMORY MAPPING mode to map register address established in the extended memory with idle SFR address in the processor, and also using a sign switch processor as integrated computer emulation (ICE) mode or normal operating mode, and the processor still uses external data transmission instruction as in ICE mode and internal one as in normal operating mode to read/write external register, respectively.

Description

(1) Technical field [0001] The present invention relates to a method and device for accelerating a processor to read and write temporary registers, in particular to a method of using memory mapping (MEMORY MAPPING) to map the address of the temporary register of the expansion memory to the idle address of the internal temporary register of the processor , and then use the internal and external data transfer commands in ICE mode or normal operation mode by switching means, so as to solve the dilemma that the built-in ICE consumes resources and the external ICE has poor read and write performance. (2) Background technology [0002] In the single chip of the 8051 series, the special function register (SFR) plays a very important role, which is a 128Bytes directly addressable memory area. Its direct address is 80H~FFH, which is a temporary register used to store peripheral device control, status and data. For functions such as interrupt, serial port, timer / counter, etc., it must...

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Application Information

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IPC IPC(8): G06F9/44G06F11/00G06F13/42
Inventor 陈志勇
Owner WINBOND ELECTRONICS CORP
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