115 results about "Extended memory" patented technology

The invention discloses a data processing system, method and device, a medium and a program product in the technical field of computers. In the application, the plurality of acceleration cards are directly connected with the plurality of memory devices through the management device, and the actual operation information of each acceleration card is collected through the management device, so that the memory space is allocated to each acceleration card as required according to the actual operation information of the acceleration cards. In other words, each memory device is not perceived by the host and is directly used as the extended memory of each acceleration card, so that the host does not need to distribute the memory for each acceleration card, thereby avoiding the condition of scrambling resources such as bandwidth easily occurring when multiple acceleration cards apply for the memory at the same time, and being not easy to cause data transmission delay. The purpose of expanding the memory for the accelerator card on the premise of not influencing the system operation performance is achieved.

The invention discloses a storage cluster, a system, a data processing method, equipment, a medium and a product, and relates to the technical field of data storage. A plurality of devices are arranged in a controller unit, a switch unit and an extended memory unit; a plurality of switches of the switch unit are correspondingly connected with a plurality of extended memories of the extended memory unit, and copy data of a plurality of controllers are respectively stored in the extended memories. The technical problem that the high availability of a storage system is poor due to the fact that the expansibility of the number of controllers and the number of data copies is poor is solved, and the purposes that memory cache data of the controllers are decoupled from DRAM memories in the controllers to external extended memories, deployment operation is simplified, N-1 controllers are allowed to fail at the same time, and the reliability of the controllers is improved are achieved. The data access processing can be completed under the condition that the M-1 switches simultaneously fail and / or the extended memories corresponding to the P-1 data copies fail, so that the technical effect of high availability of the storage system is improved.

Multiple roots of trust are described under a super Root of trust (SROT). One embodiment includes: cores of a host processor; a host processor memory subsystem to provide access to a host processor memory; a home agent to provide access by the cores to the host processor memory subsystem and an expansion memory subsystem, a source address decoder to decode memory requests generated from the plurality of cores to determine whether the memory requests are to be directed to the host processor memory subsystem or the expansion memory subsystem. Host-based security circuitry encrypts and decrypts memory requests directed to the expansion memory subsystem, the host-based security circuitry to perform the encryption and decryption based on a second key stored in a cache maintained by the host-based security circuitry.

The invention discloses a heterogeneous acceleration method of a database, electronic equipment, a storage medium and a program product, and relates to the technical field of data processing.The method is applied to a host side, the host side is connected with an extended memory through an accelerator, and indexes of variable-length column fields of a data table are constructed before query; during query, the variable-length column fields and page meta-information are sent to an accelerator, the accelerator calculates the positions and the lengths of the column fields in the storage page according to the meta-information and the variable-length column field indexes, filtering calculation is carried out, and the positions and the lengths of the column fields in the storage page are obtained; a calculation result used for representing that the filtering condition is met and the memory access saturation of the selection column and the filtering column in the storage page are generated, the host side obtains the selection column field based on the filtering calculation result so as to improve the filtering calculation performance and reduce the calculation consumption of a CPU for searching for the column field, meanwhile, page migration is conducted according to the memory access saturation, and the efficiency of page migration is improved. The access delay is further reduced; and the filtering calculation performance is improved.

The invention provides a memory management method, and the method is realized by a processor core through executing program codes so as to manage data in a memory. In this way, whether the data stored in the memory is changed due to the memory reliability problem or not can be recognized through a software means. Compared with the ECC technology needing a controller and / or a DDR chip to support the ECC characteristics, the memory management method provided by the invention does not need to change the design of a hardware circuit, is beneficial to reducing the requirement of memory management on DDR hardware, and expands the use scene of the memory management method. ECC particles of a CPU small system can be removed in some scenes, and hardware cost reduction is achieved. The invention further provides a management device corresponding to the management method, computer equipment, a computer readable storage medium and a computer program product.

The embodiment of the invention provides a memory page migration method, a CXL memory extension device and a computing device. The method is applied to a CXL memory extension device. The method comprises the following steps: receiving a first migration instruction of computing equipment based on a CXL.io protocol; the first migration instruction is used for indicating to migrate the first target memory page to the CXL extended memory; wherein the first target memory page is a cold page of which the access popularity meets a preset condition in the memory of the computing device; the CXL extended memory is a memory in a CXL extended memory device; and in response to the first migration instruction, migrating the first data in the first target memory page to the CXL extended memory based on a CXL.cache protocol. According to the method, CPU resources can be released, and the computing performance of the system is improved.

Embodiments of this application relate to a server and an electronic device. The server and the device are used to resolve the problem that memory module groups inside a server are difficult to expand and therefore the processing performance of the server is limited. The server includes a mainboard, a CPU, and an expanded memory module group. The mainboard comprises memory expansion connectors. The CPU is on the mainboard and is coupled to the memory expansion connectors. The expanded memory module group is on one side of and spaced from the mainboard, and is coupled to memory expansion connectors.

The invention discloses a memory access method based on a memory expansion controller, a memory expansion card and equipment, and relates to the technical field of computers, and the method comprises the following steps: carrying out twice address mapping on a target access address in a memory read-write instruction through the pre-created memory expansion controller, the target access address is mapped to a hard disk storage space from a processor memory physical address space, whether the mapped access address is hit in a preset cache space or not is judged, and if the mapped access address is hit, read-write operation is directly conducted on corresponding target data in the preset cache space; and if not, performing read-write operation on the corresponding target data in the solid state disk. By means of the mode, the solid state disk can be used as the extended memory of the host, the memory extension cost is remarkably reduced, ultra-large-capacity memory extension can be achieved, accordingly, the memory access cost is reduced, and meanwhile the access speed is taken into account in the mode of presetting the cache space.

The invention discloses a memory performance detection method, device and equipment and a memory medium, and relates to the technical field of memory performance detection. Memory with the same capacity of a data path port of a memory box is mapped to an endpoint port, the mapped memory is converted into an extended memory which can be identified by a host node, and then the memory performance of the extended memory is subjected to a consistency test, so that a memory mapping relationship can be quickly and effectively established; according to the embodiment of the invention, the host nodes can schedule the memory capacity required by the host nodes in the memory box, and the inconsistency caused by different mapped memory spaces is eliminated by configuring extended memories with the same capacity for the host nodes, so that the memory performance of the plurality of host nodes tends to be consistent on the premise, and the effectiveness of the consistency test is improved.

The invention discloses a memory processing system, method and device, a medium and a program product in the technical field of computers. In the application, the plurality of memory devices are used as extended memories of the plurality of computing devices in the host. The switching devices are connected between the computing devices and the memory devices and can determine the memory devices connected with downstream ports, record corresponding memory connection relations and send the memory connection relations to a main management controller in a host; when any computing device reads and writes the memory abnormally, the main management controller locates the abnormal memory device based on all the received memory connection relationships, and sends a hot removal command to the switching device connected with the abnormal memory device through the network device, so that the corresponding switching device responds to the hot removal command and performs hot removal on the abnormal memory device. Therefore, global memory connection topology identification, fault detection and hot removal are realized for the memory device, and normal operation of host services is not affected.

The invention discloses a memory allocation method and device and a storage medium, and relates to the field of computers. Performing hierarchical division on the memory nodes based on access performance of the memory nodes, constructing an affinity group in combination with an access relationship between the computing nodes and the memory nodes, and incorporating local memory nodes and extended memory nodes into a memory allocation range; meanwhile, weight factors reflecting the relative access capability of the memory nodes are distributed to the memory nodes in the affinity group, so that the memory can be distributed in a weighted mode according to performance differences. The memory resource allocation does not simply depend on a physical topology and a local priority strategy, but comprehensively considers the bandwidth and delay difference of the heterogeneous memory, thereby avoiding the problems of excessive consumption of high-performance memory nodes and idle low-performance nodes; the problems of performance bottleneck and resource allocation imbalance caused by the fact that related technical strategies cannot deal with heterogeneous memory differences are solved, and the effects of balancing and efficiently utilizing the memory and improving the overall performance and resource utilization rate of the system are achieved.

The invention discloses a three-level cache replacement method based on dirty page perception and adaptive capacity, and belongs to the technical field of computer memory cache management. The method comprises the following steps of: constructing a short-time-efficiency queue, a medium-time-efficiency queue and a global queue in a CXL extended memory equipment side cache; executing object insertion, migration and metadata updating according to the hit condition of the access request in each queue; when the cache space is insufficient, the access count, the dirty page mark and the dirty page revival mark are combined to execute eviction judgment; and calculating a return visit ratio based on global queue identifier insertion times and return visit times, and dynamically adjusting short-time-efficiency and medium-time-efficiency queue capacities. According to the method, the problems of high dirty page write-back cost and inflexible cache space distribution in the CXL extended memory are solved, and the redundant write-back overhead is reduced, the utilization efficiency of the cache space is improved and the access delay is reduced through collaborative optimization of the access characteristics, the dirty page state and the elimination return visit behavior.

The present application relates to the technical field of servers and discloses a server operation starting method and device, a server, and a storage medium. The method comprises: in a power-on self-test process of a server, on the basis of an external loading sequence, using a target configuration space to load an extended memory of each target external device; in response to detecting that the space of the target configuration space is insufficient, detecting the remaining space of another module in a preset addressing space; and in response to determining that the remaining space meets a demand space corresponding to the target configuration space, re-allocating the preset addressing space, to make the configuration space reallocated to an external device loading module be greater than or equal to the sum of the target configuration space and the demand space. According to the present application, when the configuration space of the external device loading module is insufficient, memory resources can be reintegrated on the basis of the use condition of the configuration space allocated to each module, it is guaranteed that limited memory resources can be utilized to the maximum extent, and the occurrence of an external device being unable to be used normally is reduced.

The invention provides a data processing method and device, equipment, a storage medium and a program product. The method is applied to expansion equipment of main equipment, the expansion equipment comprises a compression engine and an expansion memory, and the method comprises the steps that a data storage request sent by the main equipment is received, and the data storage request comprises first initial data; performing compression processing on the first initial data through a compression engine to obtain first compressed data; and storing the first compressed data in the extended memory. And the data storage efficiency is improved.

The invention discloses a cross-platform multi-environment compatibility test method and device, electronic equipment and a storage medium. Constructing an attribute set according to the acquired business terminal attribute information, and constructing a mirror image and an environment description vector according to the attribute set; obtaining a use case execution log, associating a log field with an environment description vector to generate a basic triple, and expanding the basic triple to obtain an expanded memory unit; maintaining the storage state of the extended memory unit by adopting a time decay strategy, calculating a load weighted average value for each pair of test targets and environment indexes, and generating a dependency matrix; splitting the dependency relationship matrix to construct a three-layer heterogeneous memory graph, analyzing the three-layer heterogeneous memory graph, and determining a test dependency graph; and performing fuzzy evaluation and analytic hierarchy process on the environment nodes in the test dependency graph, determining the comprehensive risk of each environment node, and executing mainstream priority and long-tail understanding test tasks according to the comprehensive risk of each environment node.

The embodiment of the invention provides a memory extension method and device, computing equipment, a computer readable storage medium and a computer program product, and the memory extension method comprises the steps that a memory extension instruction is received, and the memory extension instruction is associated with a target operating system; the target operating system is obtained by converting an operating system running in a physical mode into running in a virtual mode; determining a memory extension parameter according to the memory extension instruction, calling a memory management interface of the target operating system, and adding an extension memory corresponding to the memory extension parameter for the target operating system; based on a memory management function preset by a memory management function, the extended memory is allocated to a target memory pool corresponding to the target operating system, and the memory contained in the target memory pool is used by the target operating system; smooth and flexible memory expansion is carried out under the condition that the operation of the target operating system is not stopped.

The invention provides a memory error processing method, system and device, a storage medium and a program product, an operating system kernel comprises a hardware error source driver, a first driver and a second driver, and the second driver is used for processing a memory error processing task of an extended memory area. The first driver is used for processing a memory error processing task of a standard memory area and distributing a memory error processing task of an extended memory area to a second driver, and the method comprises the following steps: acquiring a memory error processing task of a target page distributed by a hardware error source driver; memory errors exist in the target page; and if the target page is the memory page of the extended memory area, calling the second driver to carry out error processing on the target page. According to the method, the reliability of error processing is improved.

The present application discloses a heterogeneous acceleration method for a database, an electronic device, a storage medium, and a program product, and relates to the field of data processing technology. The method is applied to a host side, which is connected to an extended memory via an accelerator. An index of a variable-length column field of a data table is constructed before a query. During a query, the variable-length column field and page meta-information are sent to the accelerator. The accelerator calculates the position and length of the column field in a storage page based on the meta-information and the variable-length column field index, and performs filtering calculations to generate calculation results for characterizing that filtering conditions are met, as well as memory saturation of selected columns and filtered columns in the storage page. The host side obtains the selected column field based on the filtering calculation results to improve filtering calculation performance and reduce CPU computing consumption for searching column fields. At the same time, page migration is performed based on memory saturation to further reduce access latency and improve filtering calculation performance.

The application discloses a processor, a data processing method, a chip and an electronic device, and belongs to the electronic technical field. The processor comprises an exchange module, a processing module and a local memory, the processing module and the exchange module are connected with the local memory and an extended memory, and the processing module is connected with the exchange module. Wherein, the processing module sends an exchange instruction to the exchange module when determining that the first data meeting the condition is located in the extended memory. The exchange module reads the first data from the extended memory and the second data from the local memory based on the exchange instruction, writes the first data into the local memory, and writes the second data into the extended memory. By exchanging the data that may be accessed from the extended memory to the local memory, the subsequent processing module can read data from the local memory, and the data reading delay is reduced.

The invention relates to the technical field of mobile communication equipment, in particular to a memory and battery extensible constant temperature mobile phone, which comprises a load early warning module, a heat consumption coupling module, a load scoring module, a temperature control scheduling module and an extended memory thermal control module. According to the method, through real-time mobile phone temperature sampling, standardization processing and thermal rise acceleration analysis, potential load pressure is recognized in advance, the thermal management response speed is increased, a heat consumption ratio sequence is established in combination with battery voltage change and thermal rise rate, heat consumption cross nodes and heat consumption ratio convergence are analyzed, and equipment heat consumption intensity and double-battery cooperation efficiency are quantified. After multi-index scoring, an operation limit grade is generated, high-heat-consumption application is limited, performance overload, low-temperature moderate overclocking and high-temperature underclocking are avoided, overheating is restrained, a dynamic thermal management mechanism is formed, equipment stability and load adaptability at the extreme temperature are enhanced, battery life is prolonged, and application balance is kept.

Disclosed are a network interface card device, a network data transmission method, apparatus, and system, a device, and a medium, which are applied to the field of Internet technologies. The network interface card device includes a programmable device, which constructs a network platform based on a memory expansion method, and the network platform includes a network interface, a target memory, and a network component. The programmable device is connected to a network through the network interface, and exchanges data with a host by the memory expansion method. The host, based on the memory expansion method, configures the target memory of the programmable device as an extended memory of the host, for storing received target network data belonging to a network interface card processed packet type, or to-be-sent network data of the host.

The application provides a data scheduling method and device and electronic equipment. The embodiment automatically identifies a cold unit memory (referred to as a cold unit memory) in a first memory, whose access frequency per unit time is less than a first set threshold, and a hot unit memory (referred to as a hot unit memory) in a second memory, whose access frequency per unit time is greater than or equal to a second set threshold, automatically schedules data in the hot unit memory in the second memory to move to an idle unit memory in the first memory, and automatically schedules data in the cold unit memory in the first memory to move to an idle unit memory in the second memory, so that data with high access frequency is stored in the local first memory of the system, and data with low access frequency is stored in the second memory which is expanded, the advantages of local memory high-speed access and memory capacity expansion are maximized, and the data access efficiency is improved.

A parallel processor assigns data for use by one or more tasks to a shared memory or memories associated with a plurality of compute units. A scheduler or other controller within or otherwise associated with the parallel processor assigns threads or groups of threads, which utilize the assigned data, to compute units as appropriate. Compute units utilize two sets of instructions, one specifying upper bits and one specifying lower bits of a memory address, to specify memory addresses that are larger than a number of bits an individual instruction can specify in a memory address field. Mode setting commands determine when and how lower bits in a memory address field of an instruction will be combined with upper bits in a previous instruction, e.g., through concatenation.

Provided in the present disclosure are a data processing method and apparatus, and a device, a storage medium and a program product, which are applied to an expansion device of a main device, the expansion device comprising a compression engine and an expansion memory. The method comprises: receiving a data storage request sent by a main device, wherein the data storage request comprises first initial data; compressing the first initial data by means of a compression engine, so as to obtain first compressed data; and storing the first compressed data in an expansion memory. The present disclosure improves the efficiency of data storage.

The application provides a virtual machine linear memory expansion method and device, a storage medium and electronic equipment, and applies to the technical field of virtual machine memory. When an application is started, a software development kit is initialized, and a preset capacity of a memory linear allocator corresponding to a system version is obtained. A memory mapping file of the SDK is parsed, a memory region range is determined, and a local method is called to find a memory starting address. According to the address, the memory linear allocator is expanded, and a target buffer is allocated by using a memory mapping function. The application effectively solves the problem of virtual machine method number limitation by improving the memory capacity, ensures stable operation in all scenarios including startup and runtime dynamic loading, and reduces the situation of crash and installation failure.

Described herein are systems and methods for dynamically configuring memory using Optical Circuit Switching (OCS). As electrical processing units such as accelerators are limited by their available bandwidth, providing disaggregated memory can help expand memory and enable better processing performance. Providing OCS devices to dynamically reconfigure processor-to-processor and processor-to-memory connections enables flexible reconfiguration of the disaggregated memory and improve performance of the system.

The present disclosure discloses a data read and write method. The method is applied to a logical management controller, where the logical management controller communicates with a central processing unit (CPU) and at least two expanded memory controllers respectively based on a compute express link (CXL) protocol, the logical management controller includes a request parsing module, an address decoding module, a request decomposition module and a request allocation module, and the method includes: parsing a received data read and write request for target data to obtain a local command; performing command parsing on the local command to determine location information for reading and writing data; generating a plurality of data read and write sub-requests based on the location information; sending the plurality of data read and write sub-requests to target expanded memory controllers; and controlling the target expanded memory controllers to perform data read and write operations in parallel according to the plurality of data read and write sub-requests.

The application discloses a data processing system, method, device, medium and program product in the computer technical field. In the application, the acceleration device provides a remote direct data access module and an extension memory module of a host computer, so that the host computer creates multiple queue pairs in the extension memory module to solve the problem of insufficient queue pairs and expand the number of queue pairs; when the host computer confirms that the queue pairs corresponding to a target port for communication with a third-party device are insufficient, the target queue pairs are selected from the extension memory module and configured to the target port, so that the on-demand dynamic allocation of the queue pairs is realized; after the target queue pairs are updated, the host computer synchronizes the target queue pairs to the acceleration device by using a cache consistency protocol, so that the acceleration device uses the remote direct data access module and the target queue pairs to improve the data transmission efficiency between the host computer and the acceleration device.

The application provides a memory expansion method, a memory access method, a device and a system, which are applied to a primary switch, and the method comprises the following steps: receiving an expansion memory resource application request initiated by a computing node server, establishing a routing connection between the computing node server and a secondary switch; and forwarding the application request and routing information of the computing node server and the secondary switch to the secondary switch, so that the secondary switch establishes a memory mapping table of a computing node server IP and a corresponding expansion memory address according to the routing information and the computing node server IP carried by the application request. Through the two-level switches, the application can construct expansion memory resources shared by multiple computing node servers, improve the overall memory utilization of the system, and through the two-level switches, the application can request the expansion memory resources, so that the memory capacity of the computing node server can be expanded in real time, and the total amount of available memory resources of a single computing node can be enhanced.

Provided in the present application are a data scheduling method and apparatus, and an electronic device. In the embodiment, a unit memory (which is referred to as a cold unit memory), an access frequency per unit time of which is lower than a first set threshold, in a first memory and a unit memory (which is referred to as a hot memory unit), an access frequency per unit time of which is greater than or equal to a second set threshold, in a second memory are automatically identified, data in the hot unit memory in the second memory is automatically scheduled and migrated into an idle unit memory in the first memory, and data in the cold unit memory in the first memory is automatically scheduled and migrated into an idle unit memory in the second memory, such that data with high access frequency is stored in the local first memory of a system, and data with low access frequency is stored in the extended second memory, so as to maximize the advantages of high-speed access performed by means of a local memory and memory capacity expansion performed by means of an extended memory, thereby improving the data access efficiency.