39 results about "Memory scrubbing" patented technology

Methods and apparatus for application aware memory patrol scrubbing techniques. The method may be performed on a computing system including one or more memory devices and running multiple applications with associated processes. The computer system may be implemented in a multi-tenant environment, where virtual instances of physical resources provided by the system are allocated to separate tenants, such as through virtualization schemes employing virtual machines or containers. Quality of Service (QoS) scrubbing logic and novel interfaces are provided to enable memory scrubbing QoS policies to be applied at the tenant, application, and / or process level. This QoS policies may include memory ranges for which specific policies are applied, as well as bandwidth allocations for performing scrubbing operations. A pattern generator is also provided for generating scrubbing patterns based on observed or predicted memory access patterns and / or predefined patterns.

A memory controller (e.g., for a memory device in a system such as a CXL system) can be configured to read first data from a first portion of an array of a memory device, determine a number of correctable errors present in the first data, and (1) in response to the number of correctable errors being less than a specified threshold number of correctable errors, perform a scrub operation using the first data, or (2) in response to the number of correctable errors being greater than a specified threshold number of correctable errors, disallow the scrub operation.

The invention relates to the technical field of health care accompanying robots, and particularly discloses a memory optimization system for an intelligent health care accompanying robot, which comprises the following steps: acquiring state data of a first application program and a time sequence of memory resource usage amount; embedding coding of state data of the first application program and time sequence association of the memory resource usage amount of the first application program are carried out by utilizing a data analysis and coding mode based on deep learning; therefore, whether memory cleaning operation is executed on the first application program or not is intelligently judged according to semantic alignment fusion representation between the application program state embedded coding feature and the application program memory resource usage amount time sequence implicit association feature. In this way, the condition of the application program memory can be accurately recognized, and misjudgment possibly caused by a traditional static rule is effectively avoided. Moreover, the optimization strategy can be automatically adjusted according to different equipment and user behavior modes, and the method does not need to depend on a fixed rule set, so as to better adapt to diversified application scenes.

The invention relates to the technical field of data security protection, in particular to a big data security protection method. The method comprises the following steps: acquiring system operation data; performing storage position mapping on the system operation data to obtain a data position mapping table; performing real-time data encryption according to the data position mapping table to obtain an encrypted data storage table; acquiring system memory data; performing reference counting statistics on the system memory data based on the encrypted data storage table to obtain a data reference state table; performing residue detection analysis on the data reference state table to obtain a data residue mark set; performing residual data multi-level cache clearing according to the data residual mark set to obtain a memory clearing verification table; and performing defragmentation optimization on the memory cleaning verification table to obtain an optimized memory layout diagram. According to the method, the weak link of dynamic data protection in the prior art is effectively solved, and the security and reliability of the big data system are remarkably improved.

The invention relates to the technical field of data processing, in particular to a vehicle-mounted software performance real-time monitoring and self-repairing method and system. Carrying out vehicle-mounted software memory monitoring to obtain monitored memory information, dividing to obtain key memory information and service software memory information, and carrying out memory stress analysis on key software to obtain an initial software stress rate; road condition information of a road surface where the vehicle is located is collected, weight distribution is carried out, and a repair weight and a service weight are obtained; randomly setting a first repair scheme for cleaning and repairing the memory, analyzing and calculating to obtain first repair fitness according to the repair weight, the service weight and the initial software stress rate, and performing iterative memory repair optimization to obtain an optimal repair scheme, and setting an optimization strategy according to the road condition information; and cleaning and repairing the vehicle-mounted software memory according to the optimal repairing scheme. By implementing the method and the system, intelligent and dynamic management of the vehicle-mounted software memory can be realized.

A memory includes a local control circuitry that manages scrub transactions using a set of sense amplifiers separate from those used for access (read and write) transactions. The local control circuitry interrupts scrub transactions to prioritize access requests, thereby offering improved memory performance. The local control circuitry also divides scrub transactions into phases and periods based on whether the scrub transaction requires access to bitlines used for read and write access. This division allows the local control circuitry to interleave and interrupt scrub transactions with access transactions in a manner that minimizes access interference.

A deep neural network (DNN) accelerator may include one or more tiles, each of which has a local memory. The local memory may include memory cuts, each of which has one or more memory banks. The local memory can facilitate address swizzling transformations. The local memory may receive a request for transferring data associated with a computation in a DNN. The request may include information indicating a first memory address that points to a first memory cut in the local memory. The local memory may transform the first memory address to a second memory address that corresponds to a second memory cut in the local memory. The data associated with the computation in the neural network is to be read from or written to the second memory cut. Memory banks may include state machines that can facilitate memory scrubbing. The local memory may also detect errors in data transfer requests.

A memory module includes a memory array, an interface and a controller. The memory array includes an array of memory cells and is configured as a dual in-line memory module (DIMM). The DIMM includes a plurality of connections that have been repurposed from a standard DIMM pin out configuration to interface operational status of the memory device to a host device. The interface is coupled to the memory array and the plurality of connections of the DIMM to interface the memory array to the host device. The controller is coupled to the memory array and the interface and controls at least one of a refresh operation of the memory array, control an error-correction operation of the memory array, control a memory scrubbing operation of the memory array, and control a wear-level control operation of the array, and the controller to interface with the host device.

A memory device includes a memory module having a plurality of memory cells, a read port, a write port, and an output port; a first multiplexer having a functional read input, a scrub read input, a scrub read enable input, and a read request output, the read request output coupled to the read port; a second multiplexer having a functional write input, a scrub write input, a scrub write enable input, and a write request output, the write request output coupled to the write port; and a logic circuit configured to scrub, via the scrub write input, at least one of the memory cells based on the scrub read input while the scrub read enable input and / or the scrub write enable input are asserted.

A Hybrid TEE device allows a Trusted Execution Environment (TEE) by incorporating hardware comprising a Cache Purging Controller, a Memory Isolation Gateway, and a Memory Clean Up into a System on a Chip device, a general purpose computing device, or a special purpose or proprietary computing or electronic device. The addition of the hardware enables a method of protecting the Trusted Execution Environment and thus reducing vulnerability to malicious software or other program code.

The embodiment of the invention provides a memory management method, a memory management device and electronic equipment. The memory management method comprises the following steps: when the electronic equipment is in a first memory tension state or is about to be in the first memory tension state, determining a first priority of each process in a plurality of processes, the first priority of each applet in the plurality of processes is lower than the first priority of any other process of the application program to which the applet belongs except all the applets; and performing memory cleaning on the electronic equipment according to the first priority of each process in the plurality of processes. According to the memory management method, the memory management device and the electronic equipment provided by the embodiment of the invention, the other processes of the applet prior to the application program to which the applet belongs can be cleaned, and the keep-alive rate of the main process or the key process of the application program to which the applet belongs is improved.

Aspects of a storage device are provided that incorporates zone-based garbage collection in a central nervous system. The storage device includes a network VM and a controller. The NVM contains first blocks, second blocks, and third blocks. The controller creates a first superblock containing the first blocks, a second superblock containing the second blocks, and a third superblock containing the third blocks. The controller allocates a first subdrive containing the first superblock for storing data overwrites and a second subdrive containing the second and third superblocks for storing sequential data in the NVM.In superblock garbage collection, where each block contains data from a specific zone, the controller moves written data for that zone from the first and third superblocks to the second superblock, while refraining from moving data from other zones from the first to the second superblock. This reduces the costs associated with storage devices, overprovisioning, and WAF (Web Application Framework).

The present disclosure relates to a system memory cleaning method, device, equipment, storage medium and program product, and relates to the field of data cleaning technology. The method includes: when the target system is in a dormant state, the number of hot starts of the target system is obtained, and when the number of hot starts meets a first preset condition, the target processor of the target system is controlled to restart within the shutdown time window. When the target system is in a dormant state and within the shutdown time window, it can be executed without affecting the user's use as much as possible, and whether the operation data corresponding to the target system is cleared based on the number of hot starts can be determined, and the memory fragments and dirty data caused by the hot start of the target system can be cleared in a relatively timely manner, and by controlling the target processor of the target system to restart, the memory fragments and dirty data stored due to the hot start of the target system can be greatly cleared.

Initialization of a memory can have different phases, first initializing a portion of memory for BIOS (basic input / output system) and initializing other portions of memory while the BIOS is operating. The initialization of the memory can be performed by the error scrub engine. In a first mode of operation, the scrub engine can initialize memory locations, then transition to performing scrub operations.

A Hybrid TEE device allows a Trusted Execution Environment (TEE) by incorporating hardware comprising a Cache Purging Controller, a Memory Isolation Gateway, and a Memory Clean Up into a System on a Chip device, a general purpose computing device, or a special purpose or proprietary computing or electronic device. The addition of the hardware enables a method of protecting the Trusted Execution Environment and thus reducing vulnerability to malicious software or other program code.

The application discloses a kind of methods for cleaning application memory, server and terminal, it is related to computer technical field.The specific embodiment of the method includes: obtaining the running information of application, wherein, the application includes: at least one business module, the running information includes: the memory information of the application and / or the use rate that the business module is used by user;According to the running information of the application, it is determined whether the memory of the application needs to be cleaned, and the corresponding processing instruction is generated, the processing instruction indicates the target integration mode of the business module;The processing instruction is sent to the terminal running the application, to make the terminal update the integration mode of the business module according to the processing instruction, to clean the memory of the application.This embodiment cleans the application from the business module level, to improve user experience.

A memory includes a local control circuitry that manages scrub transactions using a set of sense amplifiers separate from those used for access (read and write) transactions. The local control circuitry interrupts scrub transactions to prioritize access requests, thereby offering improved memory performance. The local control circuitry also divides scrub transactions into phases and periods based on whether the scrub transaction requires access to bitlines used for read and write access. This division allows the local control circuitry to interleave and interrupt scrub transactions with access transactions in a manner that minimizes access interference.

The invention relates to memory scrubbing based on detected correctable errors. A memory controller (e.g., a memory device for use in a system such as a CXL system) can be configured to read first data from a first portion of an array of memory devices, determine a number of correctable errors present in the first data, and (1) in response to the number of correctable errors being less than a specified threshold number of correctable errors, determine whether the number of correctable errors is less than the specified threshold number of correctable errors. A scrubbing operation is performed using the first data, or (2) in response to the number of correctable errors being greater than a specified threshold number of correctable errors, the scrubbing operation is not allowed.

The invention relates to a memory cleaning method and device, equipment, a storage medium and a vehicle, and the method comprises the steps: responding to the need of releasing a memory, and selecting a candidate searching and killing process from a preset process list; calculating a memory cleaning income obtained after searching and killing the candidate searching and killing process, wherein the memory cleaning income represents an influence condition on an available memory of the system after searching and killing the candidate searching and killing process; if the memory cleaning income represents that the available memory of the system is increased after the candidate searching and killing process is searched and killed, determining the candidate searching and killing process as a target searching and killing process; and searching and killing the target searching and killing process to release the memory occupied by the target process. According to the method and the device, the memory cleaning income for searching and killing the process is calculated before searching and killing the process, and searching and killing operation can be performed after the memory cleaning income is determined to indicate that the available memory in the system can be increased after searching and killing the process, so that the process searching and killing accuracy is ensured, and the memory state of the operating system can be further ensured to be improved.

The invention discloses a large-scale high-throughput task query request processing method and system, and relates to the field of computer cluster scheduling. The large-scale high-throughput task query request processing system comprises a system architecture design module, a core processing mechanism module, a key configuration parameter setting module and a service operation process module. The large-scale high-throughput task query request processing system has the following technical advantages that the scheduling performance is improved through an architecture decoupling and resource isolation mechanism; the performance interference of lock competition, thread switching and frequent I / O operation in a traditional scheme on a scheduler is eliminated through architecture decoupling, the actual measurement scheduling delay is reduced by 40%-60%, the process creation overhead is reduced through a main control process merging request mechanism and maxrequest sonfork parameter regulation and control, the system throughput is improved, the resource utilization rate is optimized, and the system performance is improved. The dual memory cleaning strategy periodically cleans and keeps the timeliness to balance the query real-time performance and memory resource occupation, and the completed task is prevented from residing for a long time.

The invention provides a security cleaning method and system for memory data, and relates to the technical field of data processing.The method comprises the steps that memory information of a target program is obtained; calculating a time entropy value of each request memory address in positive correlation with the memory information leakage degree; establishing a reference graph for describing association among the memory addresses of the requests; obtaining a request memory address of the lost reference relationship, a strong reference leakage memory amount and a strong reference leakage memory amount proportion; based on the graph theory and the steady-state probability of the Markov chain, quantifying the circular reference leakage memory amount of the lost circular reference relationship and the weak reference leakage memory amount of the lost weak reference relationship in the reference graph; reducing the circular reference leakage memory capacity and the weak reference leakage memory capacity in combination with a topology fusion technology, and outputting the reduced circular reference leakage memory capacity and the reduced weak reference leakage memory capacity; and performing memory data cleaning according to the obtained leakage memory amount. The system burden is reduced while the accuracy and efficiency of memory cleaning are improved.

A system on a chip (SOC) includes a critical domain including components configured to perform critical operations and a non-critical domain including components configured to perform non-critical operations. To help perform such operations, the critical domain and non-critical domain share a static random-access memory (SRAM) that includes a first subset of memory banks assigned to the critical domain and a second subset of memory banks assigned to the non-critical domain. The SOC further includes a memory scrubbing circuitry configured to sequentially check each memory bank of the SRAM for errors. To this end, the memory scrubbing circuitry is configured to check a respective memory bank for errors each time an event trigger occurs by implementing one or more error correction codes.

1. The name of the design product: computer check graphical user interface for electronic equipment. 2. The use of the design product: for an electronic device. 3. The design points of the design product: in the graphical user interface. 4. The picture or photo that best indicates the design points: design 1 front view. 5. Other views are conventional designs, and other views are omitted. 6. Design 1 is designated as the basic design. 7. The use of the graphical user interface: this interface is used for computer physical examination, Trojan horse killing, memory cleaning, system repair. Design 1 interface change state diagram is the interface presented after clicking "one-key cleaning" in design 1 front view. Design 2 interface change state diagram is the interface presented after clicking "quickly kill" in design 2 front view. Design 3 interface change state diagram is the interface presented after clicking "one-key repair" in design 3 front view. Design 4 interface change state diagram is the interface presented after clicking "quickly kill" in design 4 front view.

A Hybrid TEE device allows a Trusted Execution Environment (TEE) by incorporating hardware comprising a Cache Purging Controller, aMemory Isolation Gateway, and a Memory Clean Up into a System on a Chip device, ageneral purpose computing device, or a special purpose or proprietary computing or electronic device. The addition of the hardware enables a method of protecting the Trusted Execution Environment and thus reducing vulnerability to malicious software or other program code.

This invention relates to the field of data security protection technology, and in particular to a method for big data security protection. The method includes the following steps: acquiring system operation data; mapping the storage locations of the system operation data to obtain a data location mapping table; performing real-time data encryption based on the data location mapping table to obtain an encrypted data storage table; acquiring system memory data; performing reference counting statistics on the system memory data based on the encrypted data storage table to obtain a data reference status table; performing residual detection analysis on the data reference status table to obtain a data residual marker set; performing multi-level cache clearing of residual data based on the data residual marker set to obtain a memory cleanup verification table; and performing defragmentation optimization on the memory cleanup verification table to obtain an optimized memory layout diagram. This invention effectively solves the weaknesses in dynamic data protection in existing technologies, significantly improving the security and reliability of big data systems.

The present invention discloses an instruction conversion memory alignment optimization method based on virtual address redirection. When an executable file is loaded and executed in a dynamic instruction conversion manner, the conversion of memory access instructions and function call instructions related to non-aligned memory access is realized through precise instruction analysis, flexible memory adjustment, optimized instruction conversion and perfect memory cleaning, which effectively solves the problem of non-aligned memory access in function call parameters and provides a feasible and efficient solution for cross-architecture assembly code conversion.

A memory device includes a memory module having a plurality of memory cells, a read port, a write port, and an output port; a first multiplexer having a functional read input, a scrub read input, a scrub read enable input, and a read request output, the read request output coupled to the read port; a second multiplexer having a functional write input, a scrub write input, a scrub write enable input, and a write request output, the write request output coupled to the write port; and a logic circuit configured to scrub, via the scrub write input, at least one of the memory cells based on the scrub read input while the scrub read enable input and / or the scrub write enable input are asserted.

An embodiment of the present invention provides a face recognition device and a memory cleaning method thereof, which relate to the field of memory cleaning technology. Among them, this face recognition device can execute steps S1 to S6 to clean the memory: S1, the processor controls the clock chip to send an electrical signal of a preset frequency. S2, after receiving the electrical signal of the preset frequency, the communication module sends a memory query command to the processor, S3, obtains the usage of a specified area in the memory, and performs judgment and processing based on the usage. S4, when it is judged that the usage is above the first preset value and less than the second preset value, a memory cleaning request is sent to the back-end platform server. S5, when it is judged that the usage is above the second preset value, or when a memory cleaning command sent by the back-end platform server is received, the communication module sends an electrical signal of a preset frequency to the processor. S6, the processor receives the electrical signal of the preset frequency, and then performs memory cleaning on the specified area of ​​the memory.

The embodiment of the invention provides an intelligent router and a memory detection prompting method, and the method can respond to an access event of terminal equipment and detect a memory state set based on operation information data. And if the memory state is a target state of running information data overload, sending a network data packet to the terminal equipment, so that the terminal equipment displays a target prompt page in response to the network data packet. Wherein the target prompt page is used for prompting to clear the operation information data. And receiving a request data packet sent by the terminal device based on the target prompt page, and executing a corresponding response program according to the request data packet. Wherein the response program is used for clearing the running information data and / or modifying the memory state into a non-target state. According to the method, the overload condition of the running information data in the memory can be notified to the user through the target prompt page, so that the user can control the memory cleaning of the intelligent router, the stability of the intelligent router is improved, and the user experience is improved.