Non-volatile storage device

A technology of non-volatile storage and storage devices, which is applied in the field of non-volatile storage devices and can solve problems such as data destruction

Inactive Publication Date: 2004-07-14
SK HYNIX INC
View PDF0 Cites 22 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the power is turned off, the data stored in both ends of the flip-flop cell is destroyed

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Non-volatile storage device
  • Non-volatile storage device
  • Non-volatile storage device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] The present invention will be described in detail with reference to the accompanying drawings.

[0029] Figure 4a A circuit diagram showing a nonvolatile memory device used as a nonvolatile logic switch according to an embodiment of the present invention.

[0030] In one embodiment, the non-volatile memory device includes a write / read controller 20, resistive memory devices R1 and R2, and a logic switch SW2.

[0031] The write / read controller 20 selectively outputs a write / read signal in response to a write control signal WRC2 input to a gate of an NMOS transistor N5 and a write control signal WRC3 input to a gate of a PMOS transistor P3. Control signal WRC1. The phase of the write control signal WRC2 is opposite to that of the write control signal WRC3.

[0032] The resistive memory device R1 is connected between a node D and a node F. The resistive memory device R2 is connected between a node E and a node F. As shown in FIG. The node F is connected to the gate o...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The present invention relates to a nonvolatile memory device, and more specifically, to a programmable nonvolatile logic switch memory (register) device using a resistive memory device. The programmable nonvolatile register uses a logic switch or a nonvolatile resistive memory device whose resistive state can be set by flowing a controlled current through it.

Description

technical field [0001] The present invention relates to a non-volatile memory device (memory device), and more particularly, the present invention relates to a programmable non-volatile logic switch storage (registration) device using a resistive memory device . Background technique [0002] Generally speaking, the data processing speed of non-volatile memory such as magnetic memory and phase change memory (PCM) is similar to the data processing speed of volatile random access memory (Random Access Memory; RAM). . Data in the nonvolatile memory can be saved when the power is turned off. [0003] figure 1 A circuit diagram representing a conventional volatile logic switching device. Since conventional logic switches and registers are volatile devices, the data stored in such registers are not retained when the power is turned off. [0004] A volatile logic switch SW1 connects a node B to a node C in response to a control signal applied to the gate input A. The gate inpu...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G11C13/00G11C11/412G11C14/00G11C16/00
CPCG11C13/0004G11C11/412G11C14/009G11C16/00
Inventor 姜熙福朴泳震
Owner SK HYNIX INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products