Processor capable of carrying out block shift operation

Abstract

An apparatus comprising: a first storage area operable to have stored therein a first packed data containing at least an A 1 , an A 2 , an A 3 , and an A 4 element; a second storage area operable to have stored therein a second packed data containing at least a B 1 , a B 2 , a B 3 , and a B 4 element; a multiply circuit including a first multiplier coupled to said first storage area to receive said A 1 and coupled to said second storage area to receive said B 1 ; a second multiplier coupled to said first storage area to receive said A 2 and coupled to said second storage are to receive said B 2 ; a third multiplier coupled to said first storage area to receive said A 3 and coupled to said second storage area to receive said B 3 ; a fourth multiplier coupled to said first storage area to receive said A 4 and coupled to said second storage area to receive said B 4 ; a first adder coupled to said first multiplier and said second multiplier; a second adder coupled to said third multiplier and said fourth multiplier; and a third storage area coupled to said first adder and said second adder, said third storage area having at least a first field and a second field, said first field for saving an output of said first adder as a first data element of a third packed data, said second field for saving an output of said second adder as a second data element of said third packed data.

Description

Technical field [0001] The invention specifically relates to the field of computer systems. More specifically, the present invention relates to the field of packet data operations. Background technique [0002] In a typical computer system, the processor is implemented to operate on a value represented by a large number of bits (such as 64) using instructions that produce a result. For example, executing an add instruction adds the first 64-bit value to the second 64-bit value and stores the result as the third 64-bit value. However, multimedia applications (such as applications for computer-supported collaboration (integration of CSC-teleconference and mixed media data processing), 2D / 3D graphics, image processing, video compression / decompression, recognition algorithms and audio processing) require Handles large amounts of data that can be represented by a small number of bits. For example, graphics data usually requires 8 or 16 bits, and sound data usually requires 8 or 16 bit...

AI Technical Summary

Problems solved by technology

The memory area contains several instructions for the processor to execute to manipulate the packed data

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