Method for controlling address power on plasma display panel and apparatus thereof
A plasma and display panel technology, applied in static indicators, instruments, etc., can solve problems such as insufficient power consumption for effective control of addresses
Inactive Publication Date: 2005-03-09
SAMSUNG SDI CO LTD
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However, in the above prior art, only the offset value of the input image data is generated, therefore, when the offset value of the data is small, the address power recovery circuits of all subfields are stopped, and when the offset value of the data When the value is larger, the address power recovery circuits of the subfields are all operated
Therefore, when the subfields are used to represent gray scales in the PDP, since the deviation of the address data of each subfield is different and the address power consumption characteristics of each subfield are different, the effective control address Existing technology is not enough in terms of power consumption
[0009] In addition, the higher the resolution of the PDP becomes, the wider the display panel area becomes, the more the power consumed when driving the address electrodes increases, therefore, only the address power recovery circuit is controlled The power consumption is problematic
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[0052] In the following detailed description, the best embodiment of the invention is shown and described, simply by means of the best mode contemplated by the inventors for carrying out the invention. In practice, the invention is capable of modification in various obvious respects, all without departing from the invention. Accordingly, the drawings and descriptions are to be regarded as illustrative in nature and not restrictive. Parts that are not described in the specification are omitted for understanding of the present invention, and similarly described parts are provided with the same reference numerals.
[0053] FIG. 1 is a diagram showing an electrode structure of a PDP (Plasma Display Panel) of a conventional three-electrode structure.
[0054] As shown in Figure 1, the PDP of the three-electrode structure includes scan electrodes (Y1, Y2, ..., Yn) and common electrodes (X) for performing scan operations and sustain operations, respectively, and address electrodes f...
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A method for controlling address power on a PDP is disclosed. Image data to be displayed on the PDP is converted into subfield data, and the subfield data is analyzed to generate a variation rate of the image data and a variation of the data per subfield. An address power recovery circuit for each subfield is operated or stopped based on the variation of the data per subfield. Image data are determined to be a normal mode or a specific mode based on the generated variation of the image data, and a gain of the image data on the specific mode is controlled and displayed on the PDP.
Description
[0001] This application claims priority and benefit from Korean Patent Application No. 2003-61178 filed on September 2, 2003 at the Korean Intellectual Property Office. Its entire content is hereby incorporated by reference. technical field [0002] The present invention relates to a plasma display panel. More particularly, the present invention relates to an apparatus and method for controlling address power on a plasma display panel. Background technique [0003] In general, a plasma display panel (PDP) is a display element for arranging a plurality of discharge cells in a matrix form, selectively emitting them, and restoring video data input as electrical signals. [0004] Grayscale will be displayed in the PDP to be operated as a color display element. To achieve this, a method for realizing gray scale is used, which divides one frame into subfields and controls them in a time-varying manner. [0005] In the above-mentioned subfield method, each subfield is time-divid...
Claims
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IPC IPC(8): G09G3/20G09G3/288G09G3/291G09G3/296G09G3/298
CPCG09G3/298G09G3/2085G09G2330/024G09G2360/16G09G3/296
Inventor 郑蹄石
Owner SAMSUNG SDI CO LTD