Link integrating apparatus and method

A collection and logical link technology, applied in the field of link collection devices and methods, can solve the problem of limited target

Inactive Publication Date: 2005-05-25
ELECTRONICS & TELECOMM RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, in this patent, a single port handles multiple ports, but the target of this patent is limited to ATM equipment and Public Switched Telephone Network (PSTN)

Method used

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  • Link integrating apparatus and method
  • Link integrating apparatus and method
  • Link integrating apparatus and method

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Embodiment Construction

[0023] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Reference is now made to the drawings, wherein the same reference numerals are used throughout the different drawings to designate the same or similar components. In this specification, if it is determined that the detailed description of related technologies or configurations unnecessarily obscures the gist of the present invention, the detailed description of the present invention will be omitted.

[0024] figure 2 is a view showing the link aggregation device according to the first embodiment of the present invention.

[0025] see figure 2 , the link aggregation device 200 according to the first embodiment of the present invention includes an IPC message control unit 210, a system management unit 220 having a plurality of virtual interfaces 221 to 229, and a plurality of applications (protocols) 231 to 233 provided at the application layer. Al...

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Abstract

The present invention relates to a link aggregation apparatus and method for aggregating multiple physical interface ports into a single logical link and using the aggregated logical links. The link aggregation means aggregates a plurality of physical interface ports into a logical link and utilizes the logical link in the main processing board connected to a plurality of line cards each having a plurality of physical interface ports. The link aggregation device includes a system management unit, a mapping table, an IPC message control unit, and at least one application. A system management unit is provided with a plurality of virtual interfaces to which ports of the physical interface are to be allocated, and manages the interfaces while managing setting information and failure information of the virtual interfaces. A mapping table is used to assign at least two of the plurality of physical interface ports to at least one of the plurality of virtual interfaces. An IPC message control unit sends IPC messages between the line card and the main processor board using a mapping table. The application performs a specified unique function in response to IPC messages sent to the virtual interface.

Description

technical field [0001] The present invention generally relates to a method of managing a plurality of physical interface ports in a communication device communicating with an external communication device through a line card, wherein each line card has a plurality of physical interface ports, and more particularly to a link aggregation device and method, It is capable of grouping multiple physical interface ports into a single logical link and using that grouped logical link. Background technique [0002] In general, link aggregation refers to a function of making a plurality of physical ports with low capacities logically regarded as a single port and making the capacity of the single logical port the sum of the capacities of the plurality of physical ports. Such a link aggregation function has the following advantages. First, from the point of view of the communication device user, the advantage is that when a higher capacity line is required without changing the cost per...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/02H04L29/10H04Q3/00
CPCG06F13/362H04L45/245H04L45/586
Inventor 林成勇石周明朴美龙李钟协丁海元金煐善
Owner ELECTRONICS & TELECOMM RES INST
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