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System for minimizing time-pulse error in communication system

A clock and error technology, applied in the field of a combined automatic frequency correction and time tracking system

Inactive Publication Date: 2005-09-21
VIA TELECOM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At figure 2 In , although the gap between samples is the same, a fixed offset 32 ​​still exists at the edge of the above-mentioned transmitted sample and received sample, and the error amount is random and may be at most Ts / 2

Method used

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  • System for minimizing time-pulse error in communication system
  • System for minimizing time-pulse error in communication system
  • System for minimizing time-pulse error in communication system

Examples

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Embodiment Construction

[0061] The present invention provides a method for combining an automatic frequency correction procedure and a clock tracking procedure to reduce a timing error in a CDMA receiver. In the example system of a CDMA receiver, a sampling interval usually defines the minimum sampling error. Traditionally, the above-mentioned automatic frequency correction and clock tracking procedures are operated independently, so that when the automatic frequency correction procedure is locked, both edge alignment and spacing relative to a received signal are fixed. fixed. The timing adjustment between transmitted samples and received samples may be offset by at most half the length of the sampling interval (ie Ts). The present invention combines the aforementioned clock tracking and automatic frequency correction procedures to minimize sampling clock errors. For the case where the sampling error is greater than 1 / 2 the sampling interval (ie >Ts / 2), the clock can be adjusted quickly by changing...

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Abstract

A circuit including an analog to digital converter and a processor is disclosed. The analog to digital converter may be configured to generate a plurality of samples from a received signal in response to a reference signal. The processor may be configured to designate one of an early sample of the samples and a late sample of the samples as an ideal sample in response to a first timing error of an on-time sample of the samples being greater than one-half a sample period of the received signal.

Description

technical field [0001] The present invention relates to a method of Code Division Multiple Access (CDMA, Code Division Multiple Access) receiver architecture, in particular to a combined automatic frequency correction (AFC, automatic frequency correction) and time tracking for minimizing sample clock errors system. Background technique [0002] In a conventional CDMA receiver, a received signal is first down-converted from a carrier frequency to a more suitable base-band for processing. This baseband signal is then digitally sampled for subsequent processing. The conventional CDMA receiver must simultaneously lock the frequency and timing clock of a signal transmitted from a transmitter before performing the above-mentioned down converting and digital sampling. The above-mentioned conventional CDMA receiver utilizes the above-mentioned digital samples to recover the transmitted signal. [0003] Please refer to figure 1 As shown, it is a block schematic diagram of part of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03J7/02H04B1/28H04L27/00
CPCH04B1/0007H04B1/28H03J7/02
Inventor 魏俊雄
Owner VIA TELECOM INC