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Address encryption method for flash memories

An address, electronic storage technology, applied in the direction of preventing unauthorized use of memory, memory systems, instruments, etc., can solve problems such as inappropriate

Inactive Publication Date: 2006-01-11
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in terms of security, it is inappropriate to split the address bus into multiple regions and then encrypt each individual region independently

Method used

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  • Address encryption method for flash memories

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Experimental program
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Embodiment Construction

[0025] The encryption method applied in an electronic storage unit according to the invention is based on the idea that the unencrypted addresses a of the access-protected storage areas are encrypted only in certain areas, i.e. by means of one or more further storage areas n , a n-1 ,...,a 1 , a 0 , making the encrypted address a’ n , a' n-1 ,...,a' 1 , a' 0 be formed.

[0026] To do this, provide i=n+1 one-to-one (-->2 i = 2 n+1 no format / cipher pair) scrambling function f 1 , f 2 ,...,f n , f n+1 , such that when passed through the function f 1 (see figure 1 ) encryption, the form a n , a n-1 ,...,a 1 , a 0 The unencrypted address of has the following form:

[0027] f 1 (a n ), f 2 (f 1 (a n )+a n-1 ), f 3 (f 2 (f 1 (a n )+a n-1 )+a n-2 ),...,f n+1 (f n (f n-1 (…)))

[0028]This enables each subregion to be encrypted with different parameters in each case.

[0029] In this paper, it is clear that although address a n , a n-1 ,...,a 1 , a...

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Abstract

In order to further develop a data processing device, in particular an electronic memory component, comprising a plurality of access-secured sub-areas, in particular a plurality of access-secured memory areas, each having at least one assigned parameter (an, an-1, . . . , a0), in particular address, and a method of encrypting at least one parameter (an, an-1, . . . , a0 ) in particular the address, of at least one access-secured sub-area, in particular at least one access-secured memory area, of at least one data processing device, in particular at least one electronic memory component, in such a way that on the one hand the security of such devices is increased considerably and on the other hand the associated expense and technical complexity are not too great, it is proposed that the parameter (an, an-1, . . . , a0) of at least one sub-area be capable of encryption only in certain areas, i.e. in dependence on least one further sub-area (a'n, a'n-1, . . . , a'1, a'0).

Description

technical field [0001] The present invention relates to a data processing apparatus, and more particularly to an electronic storage unit comprising a plurality of access-protected sub-areas, in particular a plurality of access-protected storage areas, each area having at least one designated parameter (a n , a n-1 ,...,a 1 , a 0 ), especially addresses. [0002] The invention also relates to a method for encrypting at least one parameter (a n , a n-1 ,...,a 1 , a 0 ), especially the address method. Background technique [0003] In known methods of encrypting secret data such as, for example, personal data, key data or other sensitive data, it is only possible to encrypt non-volatile memory units in a more or less fixed manner as a small physical bulk memory, in other words In other words, this means that access to the memory can only be denied as a whole in the traditional way. [0004] This method of encrypting the entire IC (Integrated Circuit) area known from th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/14G06F1/00G06F21/60G06F21/62
CPCG06F12/1408
Inventor M·福塞S·索梅
Owner NXP BV
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