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Formation of a relaxed useful layer from a wafer with no buffer layer

A useful, wafer-based technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as long buffer layers, expensive processes, and difficulties

Inactive Publication Date: 2006-05-17
SOITEC SA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] Thus, the production of such buffer layers usually involves lengthy, difficult and expensive processes

Method used

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  • Formation of a relaxed useful layer from a wafer with no buffer layer
  • Formation of a relaxed useful layer from a wafer with no buffer layer
  • Formation of a relaxed useful layer from a wafer with no buffer layer

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0162] Example 1: Referring to Figure 1a, this involves the following situation, wherein the wafer 10 comprises:

[0163] Si supporting substrate 1; and

[0164] • A strained layer 2 of SiGe with a defined Ge concentration, with a thickness smaller than the critical limiting stress thickness (as described above).

[0165] The strained SiGe layer 2 typically has a Ge concentration greater than 15%.

[0166] The strained SiGe layer 2 preferably has less than about 10 7 cm -2 defect density, such as dislocations.

[0167] The 15% Ge strained layer 2 and the 30% Ge strained layer 2 typically have thicknesses of about 250 nm and about 100 nm, respectively, thereby remaining below their respective critical limiting elastic strain thicknesses.

[0168] Referring to FIG. 1b, perturbation region 3 may be formed in Si support substrate 1 by implanting particles such as hydrogen (H) or helium (He).

[0169] The range of H or He implantation energies used is typically between 12 and ...

example 2

[0191] Example 2: Reference figure 2 , this example involves the same wafer 10 as Example 1, but also includes a relaxed Si layer on a strained SiGe layer.

[0192] Thus, strained layer 2 includes strained SiGe layer 2A and relaxed Si layer 2B.

[0193] The strained layer 2 has a thickness smaller than the stated critical thickness of SiGe, above which the SiGe layer relaxes.

[0194] The strained layer 2A has the same characteristics as the strained SiGe layer 2 of Example 1.

[0195] The relaxed Si layer 2B has a thickness much smaller than that of the whole strained layer 2, so that the strained layer 2 maintains the characteristics of the whole strained structure.

[0196] Relaxed Si layer 2B has a thickness of about several tens of nanometers.

[0197] Then the implementation of the removal method is the same as in Example 1.

[0198] The generation of conversion layer 4 identical to Example 1 and the additionally preferred heat treatment have the following effects: ...

example 3

[0211] Example 3: Reference image 3 , this example involves the same wafer 10 as Example 2, additionally including a strained SiGe layer on a relaxed Si layer.

[0212] Then, strained layer 2 is composed of strained SiGe layer 2A, relaxed Si layer 2B, and strained SiGe layer 2C.

[0213] The strained layer 2 has a thickness below the stated critical thickness of SiGe, above which SiGe relaxes.

[0214] The strained layer 2A has the same characteristics as the strained SiGe layer 2 of Example 1.

[0215] The thickness of layer 2A is preferably chosen to be greater than or equal to the usual thickness in which structural defects occurring near the interface with the conversion layer 4 may be confined after propagation of the perturbation in the conversion layer 4 .

[0216] This strained SiGe layer 2A will thus protect the relaxed Si layer 2B and the strained SiGe layer 2C from any structural defects throughout the relaxation of the strained layer 2 .

[0217] This sacrifici...

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Abstract

Method for forming a useful layer (6) from a wafer (10) comprising a support substrate (1) and a strained layer (2) each selected from a crystalline material. The method comprises: a first step of forming a perturbed region (3) at a defined depth in a support substrate (1) by generating an at least relatively relaxed structural perturbation capable of inducing an elastic strain in the strained layer (2); step, providing energy to induce at least a relative relaxation of the elastic strain in the strained layer (2); a third step, removing a part of the wafer (10) from the side opposite to the relaxed strained layer (2), the useful layer (6 ) is the remainder of the wafer (10). The invention also relates to the use of this method and the wafers produced in this process.

Description

technical field [0001] The invention relates to the formation of useful layers from a wafer comprising a substrate and a strained layer respectively selected from crystalline materials for microelectronics, optics or optoelectronics. Background technique [0002] In this text, a layer is called a "relaxed" layer if it contains a crystalline material with the same lattice parameter as its nominal lattice parameter, that is, the lattice parameter of the material is balanced is in its ontological form. [0003] In contrast, a "strained" layer refers to a layer whose crystal structure is elastically strained by tension or compression during crystal growth, such as epitaxial growth requiring its lattice parameter to be different from the nominal lattice parameter of the material. Any layer of crystalline material. [0004] In the same wafer, forming a layer of a first crystalline material on a substrate of a second crystalline material each having a different nominal lattice pa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762H01L21/20
CPCH01L21/76254H01L21/76256H01L21/76259Y10S438/933H01L21/20H01L21/762
Inventor T·阿卡兹B·吉塞林
Owner SOITEC SA