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Mechanism for efficient wearout counters in destructive readout memory

a readout memory and wearout counter technology, applied in the field of destructive readout memories, can solve the problems of the ferroelectric properties of polymer materials degraded after extensive us

Inactive Publication Date: 2003-03-27
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the ferroelectric properties of the polymer material degrade after extensive use.

Method used

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  • Mechanism for efficient wearout counters in destructive readout memory
  • Mechanism for efficient wearout counters in destructive readout memory
  • Mechanism for efficient wearout counters in destructive readout memory

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Embodiment Construction

[0013] Memory devices, such as disks or disk caches, are typically laid out in blocks of 512 bytes. Each block of data has metadata associated with it, which may include an error correction code (ECC) that allows checking and correction of errors in that data block. Typically, the ECC is a pre-existing data set, even if the memory has never been accessed, even if the pre-existing data is all zeros. If the memory block is being used as cache memory, there will often be flags and other information may also reside in the metadata section allowing the system to make cache policy decisions. This data may include usage information for replacement of data, etc. This section may also include a wear out counter that tracks the usage history of the block of memory.

[0014] In FIG. 1, a memory chip 10 has at least one block of memory that resides upon it. Each block of memory has a sector of memory cells 12 and a metadata section 14. The metadata section may include the ECC, flags for cache oper...

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PUM

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Abstract

A memory device having a wear out counter. The memory device comprises at least one block of memory, that block having a metadata section associated with it. A number of bits in the metadata section are used to store the current state of a wear out counter. As the block is accessed, the counter is incremented, allowing a memory controller to level usage and to rectify any problems associated with wear out of that block. A method for incrementing the counter is also included.

Description

[0001] 1. Field of the Invention[0002] This disclosure relates to destructive readout memories, more particularly to mechanisms to track and level usage in these memories.[0003] 2. Background of the Invention[0004] Polymer ferroelectric memories generally comprise a polymer material having ferroelectric properties arranged adjacent to some type of control structures. The control structures may be as simple as metal electrode lines. The control structures manipulate the ferroelectric state of the polymer material. In memory applications, the ferroelectric state having one characteristic is determined to be a data `one,` and a different characteristic is determined to be a data `zero.`[0005] These memories are relatively inexpensive on a cost / bit basis, and reasonable simple to manufacture. However, the ferroelectric properties of the polymer material degrade after extensive use. It would be helpful to track access of the memory array to manage usage and wear out of blocks within the ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G11C11/22
CPCG11C11/22
Inventor COULSON, RICHARD L.
Owner INTEL CORP