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Memory interface for systems with multiple processors and one memory system

a memory system and interface technology, applied in the field of memory systems, can solve the problems of large amount of on-chip memory in most digital asics, not very scalable, and more expensive problems

Inactive Publication Date: 2005-04-14
TELEFON AB LM ERICSSON (PUBL)
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0011] It should be emphasized that the term comprises / comprising, when used in this specification, is taken to specify the presence of stated features, integers, steps, or components, but does not preclude the presence or addition of one or more other features, integers, steps, components, or groups thereof.

Problems solved by technology

On-chip memory has the advantage of being faster than external memory, but is more expensive and not very scalable.
Thus, the amount of on-chip memory in most digital ASICs is relatively small.
Since only one CPU may control the external memory at a time, a number of challenges are placed on the design of the memory interface.

Method used

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  • Memory interface for systems with multiple processors and one memory system

Examples

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Embodiment Construction

[0015] Following is a Detailed Description of Illustrative Embodiment(s) of the invention with reference to the drawings wherein the same reference labels are used for the same or similar elements. As used herein, the term “access”, when used in conjunction with the term “external memory”, means and refers to any memory operation, including, but not necessarily limited to, read operations, write operations, and refresh operations.

[0016] While asynchronous request-and-grant systems work reasonably well, improvements in several areas are desirable. For example, various handshakes that take place between the CPU and the memory interface can consume valuable bandwidth. In addition, it is difficult to predict the latency of the system with any accuracy for a given CPU because the memory access, once granted, is usually not interrupted until the CPU is finished. This unknown and potentially long wait time may cause problems for other CPUs, especially in real-time-oriented applications.

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PUM

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Abstract

Memory interface for multi-CPU system provides predefined time slots in which each CPU may access an external memory. The time slot assigned to each CPU may be defined according to the expected memory requirements of the CPU. In this way, each CPU is guaranteed to have a certain amount of dedicated bandwidth to the external memory. The predefined time slots also allow the latency of the system to be known, which is useful for real-time oriented applications. Moreover, each CPU may use its own clock during its allotted time slot to control the external memory, thus accommodating various clock domains in the system. Memory refresh and data protection functions are also provided. This Abstract is provided to comply with rules requiring an Abstract that allows a searcher or other reader to quickly ascertain subject matter of the technical disclosure. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Description

CROSS REFERENCE TO RELATED APPLICATIONS [0001] This Application claims priority from, and hereby incorporates by reference, U.S. Provisional Application Nos. 60 / 509,503, filed Oct. 8, 2003; 60 / 510,074, filed Oct. 9, 2003; and 60 / 530,960, filed Dec. 19, 2003, all bearing the title “High Performance and Reliability Memory Interface for Systems with Multiple CPUs and One Memory.”BACKGROUND [0002] 1. Technical Field [0003] The present invention relates to memory systems and, in particular, to an interface for a memory system that is accessible by multiple processors. [0004] 2. History of Related Art [0005] A control processor (CPU) requires memory in order to operate. The memory may be on the same integrated circuit or “chip” with the CPU, as in the case of a digital application specific integrated circuit (ASIC), or it may be located externally. On-chip memory has the advantage of being faster than external memory, but is more expensive and not very scalable. Thus, the amount of on-chi...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F9/50G06F12/14G06F13/16
CPCG06F13/1605G06F12/1441G06F9/50G06F9/46
Inventor ANGSMARK, FREDRIKNILSSON, TORDBARROW, DAVID
Owner TELEFON AB LM ERICSSON (PUBL)
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